LCMXO1200C-5FTN256C LATTICE SEMICONDUCTOR, LCMXO1200C-5FTN256C Datasheet - Page 43

• Manufacturer Part Number: LCMXO1200C-5FTN256C
• Description: CPLD MachXO Family 600 Macro Cells 1.8V/2.5V/3.3V 256-Pin FTBGA Tray
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LCMXO1200C-5FTN256C

• Package: 256FTBGA
• Family Name: MachXO
• Number Of Macro Cells: 600
• Maximum Propagation Delay Time: 3.6 ns
• Number Of User I/os: 211
• Typical Operating Supply Voltage: 1.8|2.5|3.3 V
• Ram Bits: 9420.8
• Memory Type: SRAM
• Operating Temperature: 0 to 85 °C

Lattice Semiconductor
Flash Download Time
JTAG Port Timing Specifications
t
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Rev. A 0.19
REFRESH
MAX
BTCP
BTCPH
BTCPL
BTS
BTH
BTRF
BTCO
BTCODIS
BTCOEN
BTCRS
BTCRH
BUTCO
BTUODIS
BTUPOEN
Symbol
Symbol
SLEEPN
Minimum V
(later of the two supplies)
to Device I/O Active
TCK [BSCAN] clock frequency
TCK [BSCAN] clock pulse width
TCK [BSCAN] clock pulse width high
TCK [BSCAN] clock pulse width low
TCK [BSCAN] setup time
TCK [BSCAN] hold time
TCK [BSCAN] rise/fall time
TAP controller falling edge of clock to output valid
TAP controller falling edge of clock to output disabled
TAP controller falling edge of clock to output enabled
BSCAN test capture register setup time
BSCAN test capture register hold time
BSCAN test update register, falling edge of clock to output valid
BSCAN test update register, falling edge of clock to output disabled
BSCAN test update register, falling edge of clock to output enabled
I/O
CC
or V
CCAUX
Parameter
LCMXO256
LCMXO640
LCMXO1200
LCMXO2280
Parameter
t
PWRDN
t
WSLEEPN
3-17
or t
WAWAKE
Power Down Mode
Min.
—
—
—
—
DC and Switching Characteristics
MachXO Family Data Sheet
Typ.
t
PWRUP
—
—
—
—
Min.
40
20
20
10
50
25
—
—
—
—
—
—
—
8
8
Max.
0.4
0.6
0.8
1.0
Max.
25
10
10
10
25
25
25
—
—
—
—
—
—
—
—
Units
mV/ns
ms
ms
ms
ms
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns