XC2S400E-6FTG256I Xilinx Inc, XC2S400E-6FTG256I Datasheet - Page 38
![no-image](/images/no-image-200.jpg)
XC2S400E-6FTG256I
Manufacturer Part Number
XC2S400E-6FTG256I
Description
FPGA Spartan®-IIE Family 400K Gates 10800 Cells 357MHz 0.15um Technology 1.8V 256-Pin FTBGA
Manufacturer
Xilinx Inc
Datasheet
1.XC2S50E-6TQG144C.pdf
(108 pages)
Specifications of XC2S400E-6FTG256I
Package
256FTBGA
Family Name
Spartan®-IIE
Device Logic Cells
10800
Device Logic Units
2400
Device System Gates
400000
Maximum Internal Frequency
357 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
182
Ram Bits
163840
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC2S400E-6FTG256I
Manufacturer:
XC
Quantity:
65
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Spartan-IIE FPGA Family: DC and Switching Characteristics
IOB Input Delay Adjustments for Different Standards
Input delays associated with the pad are specified for LVTTL. For other standards, adjust the delays by the values shown. A
delay adjusted in this way constitutes a worst-case limit.
38
Data Input Delay Adjustments
T
T
T
T
ILVCMOS18
T
Symbol
ILVCMOS2
T
T
T
T
T
T
IPCI33_3
IPCI66_3
ILVPECL
T
T
T
ISSTL2
ISSTL3
ILVTTL
ILVDS
IGTLP
IHSTL
IAGP
IGTL
ICTT
Standard-specific data input delay
adjustments
Description
www.xilinx.com
LVTTL
LVCMOS2
LVCMOS18
LVDS
LVPECL
PCI, 33 MHz, 3.3V
PCI, 66 MHz, 3.3V
GTL
GTL+
HSTL
SSTL2
SSTL3
CTT
AGP
Standard
–0.11
0.20
0.15
0.15
0.08
0.14
0.14
0.04
0.04
0.04
0.10
0.04
-7
0
0
Speed Grade
DS077-3 (v2.3) June 18, 2008
–0.11
0.20
0.15
0.15
0.08
0.14
0.14
0.04
0.04
0.04
0.10
0.04
Product Specification
-6
0
0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R
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