MC100ES6535DT Freescale, MC100ES6535DT Datasheet

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MC100ES6535DT

Manufacturer Part Number
MC100ES6535DT
Description
Manufacturer
Freescale
Datasheet
1.MC100ES6535DT.pdf (8 pages)

Specifications of MC100ES6535DT

Lead Free Status / RoHS Status
Not Compliant
fanout buffer. The ES6535 has two selectable inputs that allow LVCMOS or LVTTL input levels
which translate to LVPECL outputs. The clock enable is internally synchronized to eliminate
runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin.
The ES6535 is ideal for high performance clock distribution applications.
Features
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MPC100ES6535 REVISION 4 JUNE 9, 2009
The MC100ES6535 is a low skew, high performance 3.3 V 1-to-4 LVCMOS to LVPECL
1 GHz maximum output frequency
20-lead Pb-free package available
4 differential LVPECL outputs
2 selectable LVCMOS/LVTTL inputs
Translates LVCMOS/LVTTL levels to LVPECL levels
30 ps maximum output skew
190 ps part-to-part skew
3.3 V operating range
20-lead TSSOP package
Ambient temperature range –40°C to +85°C
3.3V LVCMOS-to-LVPECL 1:4 Fanout Buffer MC100ES6535
1
MC100ES6535DT
MC100ES6535DTR2
MC100ES6535EJ
MC100ES6535EJR2
ORDERING INFORMATION
Device
20-LEAD TSSOP PACKAGE
20-LEAD TSSOP PACKAGE
©2009 Integrated Device Technology, Inc.
Pb-FREE PACKAGE
CASE 948E-02
CASE 948E-02
EJ SUFFIX
DT SUFFIX
TSSOP-20 (Pb-Free)
TSSOP-20 (Pb-Free)
DATA SHEET
TSSOP-20
TSSOP-20
Package

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MC100ES6535DT Summary of contents

Page 1

... Ambient temperature range –40°C to +85°C • 20-lead Pb-free package available MPC100ES6535 REVISION 4 JUNE 9, 2009 20-LEAD TSSOP PACKAGE 20-LEAD TSSOP PACKAGE ORDERING INFORMATION Device MC100ES6535DT MC100ES6535DTR2 MC100ES6535EJ MC100ES6535EJR2 1 ©2009 Integrated Device Technology, Inc. DATA SHEET DT SUFFIX CASE 948E-02 EJ SUFFIX Pb-FREE PACKAGE ...

Page 2

MPC100ES6535 Data Sheet Table 1. Pin Description Number Name 1 V Power EE 2 CLK_EN Input 3 CLK_SEL Input 4 CLK0 Input 6 CLK1 Input Unused 10, 13 Power CC 11, 12 Q3, ...

Page 3

MPC100ES6535 Data Sheet . Clock Input Function Table Inputs CLK0 or CLK1 Q0: HIGH Table 3. General Specifications Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection θ Thermal Resistance JA (Junction-to-Ambient) Meets or exceeds JEDEC Spec ...

Page 4

MPC100ES6535 Data Sheet Table 7. AC Characteristics (V = 3.135 Symbol Characteristic f Maximum Toggle Frequency max t Propagation Delay to Output Differential PD t Skew SKEW t Cycle-to-Cycle Jitter JITTER V Output Peak-to-Peak ...

Page 5

MPC100ES6535 Data Sheet MPC100ES6535 REVISION 4 JUNE 9, 2009 PACKAGE DIMENSIONS CASE 948E-02 ISSUE C 20-LEAD TSSOP PACKAGE 5 3.3V LVCMOS-TO-LVPECL 1:4 FANOUT BUFFER PAGE ©2009 Integrated Device Technology, Inc. ...

Page 6

MPC100ES6535 Data Sheet MPC100ES6535 REVISION 4 JUNE 9, 2009 PACKAGE DIMENSIONS CASE 948E-02 ISSUE C 20-LEAD TSSOP PACKAGE 6 3.3V LVCMOS-TO-LVPECL 1:4 FANOUT BUFFER PAGE ©2009 Integrated Device Technology, Inc. ...

Page 7

MPC100ES6535 Data Sheet MPC100ES6535 REVISION 4 JUNE 9, 2009 PACKAGE DIMENSIONS CASE 948E-02 ISSUE C 20-LEAD TSSOP PACKAGE 7 3.3V LVCMOS-TO-LVPECL 1:4 FANOUT BUFFER PAGE ©2009 Integrated Device Technology, Inc. ...

Page 8

MPC100ES6535 Data Sheet 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications ...

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