M48T201V-85MH1TR STMicroelectronics, M48T201V-85MH1TR Datasheet

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M48T201V-85MH1TR

Manufacturer Part Number
M48T201V-85MH1TR
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of M48T201V-85MH1TR

Bus Type
Parallel
User Ram
512KB
Operating Supply Voltage (typ)
3.3V
Package Type
SOH
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
44
Mounting
Surface Mount
Date Format
DW:DM:M:Y
Time Format
HH:MM:SS
Lead Free Status / RoHS Status
Not Compliant
Features
March 2009
Converts low power SRAM into NVRAMs
Year 2000 compliant
Battery low flag
Integrated real time clock, power-fail control
circuit, battery and crystal
Watchdog timer
Choice of write protect voltages
(V
– M48T201Y: V
– M48T201V: V
Microprocessor power-on reset (valid even
during battery backup mode)
Programmable alarm output active in the
battery backed-up mode
Packaging includes a 44-lead SOIC and
SNAPHAT
SOIC package provides direct connection for a
SNAPHAT
crystal
RoHS compliant
– Lead-free second level interconnect
PFD
4.1V V
2.7 V
= power-fail deselect voltage):
®
®
V
PFD
PFD
top which contains the battery and
top (to be ordered separately)
CC
CC
4.5 V
3.0 V
= 4.5 to 5.5 V
= 3.0 to 3.6 V
5.0 or 3.3 V TIMEKEEPER
Rev 7
44
SNAPHAT
crystal/battery
SOH44 (MH)
44-pin SOIC
1
®
(SH)
M48T201Y
M48T201V
®
supervisor
www.st.com
1/37
1

Related parts for M48T201V-85MH1TR

M48T201V-85MH1TR Summary of contents

Page 1

... Watchdog timer ■ Choice of write protect voltages (V = power-fail deselect voltage): PFD – M48T201Y 4 4.1V V 4.5 V PFD – M48T201V 3 3.0 V PFD ■ Microprocessor power-on reset (valid even during battery backup mode) ■ Programmable alarm output active in the battery backed-up mode ■ ...

Page 2

... Reset inputs (RSTIN1 & RSTIN2 3.10 Calibrating the clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.11 Battery low warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.12 Initial power-on defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.13 V noise and negative going transients . . . . . . . . . . . . . . . . . . . . . . . . . Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 7 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8 Environmental information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 2/37 ® registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 M48T201Y, M48T201V ...

Page 3

... M48T201Y, M48T201V 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Contents 3/37 ...

Page 4

... Table 18. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 ® Table 19. SNAPHAT battery table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 20. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 4/37 ® , pack. mech. data . . . . . . . . . . . . . . . 31 ® housing for 48 mAh battery & crystal, pack. mech. data . . . . . . . 32 ® housing for 120 mAh battery & crystal, pack. mech. data . . . . . . 33 M48T201Y, M48T201V ...

Page 5

... M48T201Y, M48T201V List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. SOIC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 3. Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 4. G timing when switching between RTC and external SRAM . . . . . . . . . . . . . . . . . . . . 11 CON Figure 5. Read cycle timing: RTC and external RAM control signals . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6. Write cycle timing: RTC and external RAM control signals Figure 7 ...

Page 6

... Figure 1. Logic diagram 6/37 and E signals. CON CON ® housing containing the battery and crystal. The A0-A18 WDI W M48T201Y M48T201V E G RSTIN1 RSTIN2 V SS M48T201Y, M48T201V ® Table 19 on page 34). 8 DQ0-DQ7 IRQ/FT RST G CON E CON SQW V OUT AI02240 ...

Page 7

... M48T201Y, M48T201V Table 1. Signal names A0-A18 DQ0-DQ7 RSTIN1 RSTIN2 RST WDI CON G CON IRQ/FT SQW V OUT Address inputs Data inputs / outputs Reset 1 input Reset 2 Input Reset output (open drain) Watchdog input Chip enable input Output enable Input WRITE enable input RAM chip enable output ...

Page 8

... RSTIN1 1 44 RSTIN2 2 43 RST A18 5 40 A16 6 39 A14 7 38 A12 M48T201Y M48T201V WDI CON 18 27 DQ0 19 26 DQ1 20 25 DQ2 AI02241 M48T201Y, M48T201V OUT SQW IRQ/FT A17 A15 A13 A8 A9 A11 A10 E E CON DQ7 DQ6 DQ5 DQ4 DQ3 NC ...

Page 9

... M48T201Y, M48T201V Figure 3. Hardware hookup 32,768 Hz CRYSTAL LITHIUM 5V CELL 0 the second chip enable pin (E2) is unused, it should be tied to V A0-A18 V OUT 0.1 F M48T201Y ECON G WDI GCON RSTIN1 RST RSTIN2 IRQ/ SQW DQ0-DQ7 . OUT Description A0-Axx (1) CMOS SRAM DQ0-DQ7 AI00604 9/37 ...

Page 10

... RAM addresses. 10/37 pins. (Users are urged to insure that voltage specifications, for both the pin. The chip enable output to RAM (E ), the control circuitry automatically switches to SO M48T201Y, M48T201V OUT ® containing the CC ) and the output enable output ...

Page 11

... M48T201Y, M48T201V Table 2. Operating modes Mode Deselect WRITE READ READ Deselect V SO Deselect 1. See Table 14 on page 30 Note 2.2 Read mode The M48T201Y/V executes a READ cycle whenever W (WRITE enable) is high and E (chip enable) is low. The unique address specified by the address inputs (A0-A18) defines which ...

Page 12

... Read cycle timing: RTC and external RAM control signals ADDRESS CON E CON tEPD W tGLQX DQ0-DQ7 12/37 READ READ tAVAV tAVAV tELQV tAVQV tELQX tGLQV tAXQX DATA OUT VALID M48T201Y, M48T201V WRITE tAVAV tAVWL tWHAX tRO tWLWH tGHQZ DATA OUT DATA IN VALID VALID AI02334 ...

Page 13

... M48T201Y, M48T201V Table 3. Read mode AC characteristics Symbol t READ cycle time AVAV t Address valid to output valid AVQV t Chip enable low to output valid ELQV t Output enable low to output valid GLQV (2) t Chip enable low to output transition ELQX (2) t Output enable low to output transition ...

Page 14

... E CON G tRO G CON tAVWL W DATA OUT DQ0-DQ7 VALID 14/37 WRITE WRITE tAVAV tAVAV tAVEH tAVWH tELEH tEHAX tWHAX tEPD tEHDX tWLWH tEHQZ tDVEH tDVWH DATA IN VALID M48T201Y, M48T201V READ tAVAV tAVQV tGLQV tWHQX tWLQZ tWHDX DATA IN DATA OUT VALID VALID AI02336 ...

Page 15

... M48T201Y, M48T201V Table 4. Write mode AC characteristics Symbol t WRITE cycle time AVAV t Address valid to WRITE enable low AVWL t Address valid to chip enable low AVEL t WRITE enable pulse width WLWH t Chip enable low to chip enable high ELEH t WRITE enable high to address transition WHAX ...

Page 16

... SRAM. This allows inputs to the M48T201Y/V and SRAMs to be “Don't care” once V falls below 2.0 V. The chip enable access time must be sufficient to meet the system needs with CC the chip enable (and output enable) output propagation delays included. 16/37 (min). The SRAM should also guarantee data retention down to PFD M48T201Y, M48T201V ...

Page 17

... M48T201Y, M48T201V 3 Clock operation 3.1 TIMEKEEPER The M48T201Y/V offers 16 internal registers which contain TIMEKEEPER watchdog, flag, and control data (see locations which contain external (user accessible) and internal copies of the data (usually referred to as BiPORT™ TIMEKEEPER cells). The external copies are independent of internal functions except that they are updated periodically by the simultaneous transfer of the incremented internal copy ...

Page 18

... BMB1 BMB0 ABE Al.10M Alarm month Al. 10 date Alarm date Al. 10 hours Alarm hours Alarm minutes Alarm seconds 100 years 0 BL RS3 RS2 M48T201Y, M48T201V Function/range BCD format D1 D0 Year Year Month Date Day Day Hours Minutes Seconds Control RB1 RB0 Watchdog Al ...

Page 19

... M48T201Y, M48T201V 3.5 Setting the alarm clock Registers 7FFF6h-7FFF2h contain the alarm settings. The alarm can be configured to go off at a prescribed time on a specific month, day of month, hour, minute, or second or repeat every month, day of month, hour, minute, or second. It can also be programmed to go off while the M48T201Y the battery backup to serve as a system wake-up call ...

Page 20

... WRITE of the watchdog register. The timeout period then starts over. The WDI pin should be tied to V watchdog will be reset on each transition (edge) seen by the WDI pin. 20/37 HIGH-Z M48T201Y, M48T201V tREC HIGH-Z AI03520 . The watchdog register REC if not used ...

Page 21

... M48T201Y, M48T201V In order to perform a software reset of the watchdog timer, the original timeout period can be written into the watchdog register, effectively restarting the countdown cycle. Should the watchdog timer time out, and the WDS bit is programmed to output an interrupt, a value of 00h needs to be written to the watchdog register in order to clear the IRQ/FT pin. ...

Page 22

... When V CC illustrate the AC reset characteristics of this function. Pulses shorter through a 100 K resistor. tR1 tR1HRZ (1) Parameter = 0 to 70° 28). M48T201Y, M48T201V falls to the power fail detect trip CC after V REC tR2 Hi-Z Hi-Z tR2HRZ AI01679 Min Max 50 200 ...

Page 23

... M48T201Y, M48T201V The oscillation rate of crystals changes with temperature (see M48T201Y/V design employs periodic counter correction. The calibration circuit adds or subtracts counts from the oscillator divider circuit at the divide by 256 stage, as shown in Figure 11 on page The number of times pulses which are blanked (subtracted, negative calibration) or split (added, positive calibration) depends upon the value loaded into the five calibration bits found in the control register ...

Page 24

... If a battery low is generated during a power-up sequence, this indicates that the battery is below approximately 2.5 V and may not be able to maintain data integrity in the SRAM. Data should be considered suspect and verified as correct. A fresh battery should be installed. 24/ -0.038 ppm ( – Temperature C M48T201Y, M48T201V AI00999 AI00594B ...

Page 25

... M48T201Y, M48T201V If a battery low indication is generated during the 24-hour interval check, this indicates that the battery is near end of life. However, data is not compromised due to the fact that a nominal V is supplied. In order to insure data integrity during subsequent periods of CC battery backup mode, the battery should be replaced. The SNAPHAT while V is applied to the device ...

Page 26

... Schottky diode 1N5817 is recommended for through hole and MBRS120T3 is recommended for surface mount. Figure 12. Supply voltage protection 26/37 bus. These transients can be reduced that drive it to values below (cathode connected 0.1 F DEVICE V SS M48T201Y, M48T201V bus. The energy stored in the by as much anode AI00605 ...

Page 27

... M48T201Y, M48T201V 4 Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied ...

Page 28

... Input rise and fall times Input pulse voltages Input and output timing ref. voltages Note: Output High Z is defined as the point where data is no longer driven. Figure 13. AC testing load circuit Note: Excluding open-drain output pin for M48T201V. Table 12. Capacitance Symbol C IN (3) ...

Page 29

... M48T201Y, M48T201V Table 13. DC characteristics Sym Parameter (2) I Input leakage current LI Output leakage ( current I Supply current CC Supply current I CC1 (standby) TTL Supply current I CC2 (standby) CMOS Battery current OSC ON I BAT Battery current OSC OFF V Input low voltage IL V Input high voltage ...

Page 30

... V rise time CC rise time 70° 4 3.0 to 3.6 V (except where noted may result in deselection/write protection not occurring until 200 µs after F may cause corruption of RAM data. FB M48T201Y, M48T201V tR tRB tREC DON'T CARE VALID HIGH-Z VALID Min Max 300 10 150 ...

Page 31

... M48T201Y, M48T201V 6 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK trademark. Figure 15. SOH44 – 44-lead plastic small outline, SNAPHAT Note: Drawing is not to scale ...

Page 32

... Typ Min Max 9.78 6.73 7.24 6.48 6.99 0.38 0.46 0.56 21.21 21.84 14.22 14.99 15.55 15.95 3.20 3.61 2.03 2.29 M48T201Y, M48T201V SHTK-A inches Typ Min 0.265 0.255 0.018 0.835 0.560 0.612 0.126 0.080 A2 Max 0.385 0.285 0.275 ...

Page 33

... M48T201Y, M48T201V Figure 17. SH – 4-pin SNAPHAT Note: Drawing is not to scale. Table 17. SH – 4-pin SNAPHAT data Symb Typ ® housing for 120 mAh battery & crystal, pack. outline ® housing for 120 mAh battery & crystal, pack. mech. mm Min Max Typ 10 ...

Page 34

... Device type M48T Supply and write protect voltage 201Y = V = 4 201V = V = 3 Speed – (for M48T201Y) – (for M48T201V) Package ( SOH44 Temperature range 70°C Shipping method for SOIC blank = tubes (not for new design - use E) ® ECOPACK package, tubes ® ...

Page 35

... M48T201Y, M48T201V 8 Environmental information Figure 18. Recycling symbols This product contains a non-rechargeable lithium (lithium carbon monofluoride chemistry) button cell battery fully encapsulated in the final product. Recycle or dispose of batteries in accordance with the battery manufacturer's instructions and local/national disposal and recycling regulations. Please refer to the following web site address for additional information regarding compliance statements and waste recycling www.st.com/rtc, then select " ...

Page 36

... Reformatted; added lead-free second level interconnect information 5 to cover page and Section 6: Package mechanical Table 10. 6 Updated shipping method in Updated Table 10, text in 7 added Section 8: Environmental M48T201Y, M48T201V Changes (Table 10, 13 14) 14) 3) (Table (Table 10) (Table 13) (Table 13) data; updated Table 18 ...

Page 37

... M48T201Y, M48T201V Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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