UPD4991ACX Renesas Electronics America, UPD4991ACX Datasheet - Page 21

• Manufacturer Part Number: UPD4991ACX
• Manufacturer: Renesas Electronics America

Specifications of UPD4991ACX

• Lead Free Status / RoHS Status: Supplier Unconfirmed

2.3.1 BASIC TIME MODE (MODE REG.
to Table 2-2).
related to a leap year and selection of the hour mode must be made in advance in TP1 CONTROL MODE or TP2
CONTROL MODE.
“3”.
supplied to the timer counter is reset. If the MODE REGISTER is set to “0”, only stages 10 through 15 of the 15-
stage divider are reset. Consequently, an error of up to 15.625 ms occurs.
30.52 s occurs. Because stages 1 through 9 of the 15-stage divider are used as the first stages of the interval timer,
an error of up to 1.95 ms occurs in the interval timer if all the stages of the divider are reset.
In this mode, addresses 0
Because a leap year cannot be identified or set and the 12- or 24-hour mode cannot be selected in this mode, setting
TIME RESET and 30 sec ADJ. differ in operation depending on whether the MODE REGISTER is set to “0” or
When TIME RESET or 30 sec ADJ. is executed, the 15-stage divider that creates the 1 second pulse which is
If the MODE REGISTER is set to “3”, all the stages of the 15-stage divider are reset, and an error of up to
32.768 kHz
H
through 0C
Figure 2-5. Block Diagram of 15-Stage Divider
R
2
H
9
MODE REG.
are used as time counters to/from which time can be written or read (refer
CHAPTER 2 OPERATIONS
0
H
512 Hz
or 3
H
)
0: OFF (Stages 10 through 15 are reset.)
3: ON (All stages are reset.)
R
2
6
To time counter
1Hz
To interval timer
RESET
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