LM555J/883/NOPB National Semiconductor, LM555J/883/NOPB Datasheet - Page 5

• Manufacturer Part Number: LM555J/883/NOPB
• Manufacturer: National Semiconductor
• Type: Standardr

Specifications of LM555J/883/NOPB

• # Internal Timers: 1
• Power Dissipation: 1.18W
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5/9/12/15V
• Operating Supply Voltage (max): 18V
• Package Type: CDIP
• High Level Output Current: -200mA
• Low Level Output Current: 200mA
• Pin Count: 8
• Operating Temp Range: -55C to 125C
• Operating Temperature Classification: Military
• Mounting: Through Hole
• Lead Free Status / RoHS Status: Compliant

Typical Performance Characteristics
Applications Information
MONOSTABLE OPERATION
In this mode of operation, the timer functions as a one-shot
( Figure 1 ). The external capacitor is initially held discharged
by a transistor inside the timer. Upon application of a nega-
tive trigger pulse of less than 1/3 V
set which both releases the short circuit across the capacitor
and drives the output high.
The voltage across the capacitor then increases exponen-
tially for a period of t = 1.1 R
voltage equals 2/3 V
flip-flop which in turn discharges the capacitor and drives the
output to its low state. Figure 2 shows the waveforms gener-
ated in this mode of operation. Since the charge and the
threshold level of the comparator are both directly propor-
tional to supply voltage, the timing internal is independent of
supply.
FIGURE 1. Monostable
CC
. The comparator then resets the
A
C, at the end of which time the
CC
to pin 2, the flip-flop is
Discharge Transistor (Pin 7)
Voltage vs Sink Current
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(Continued)
5
V
TIME = 0.1 ms/DIV.
R
C = 0.01 µF
During the timing cycle when the output is high, the further
application of a trigger pulse will not effect the circuit so long
as the trigger input is returned high at least 10 µs before the
end of the timing interval. However the circuit can be reset
during this time by the application of a negative pulse to the
reset terminal (pin 4). The output will then remain in the low
state until a trigger pulse is again applied.
When the reset function is not in use, it is recommended that
it be connected to V
gering.
Figure 3 is a nomograph for easy determination of R, C val-
ues for various time delays.
NOTE: In monostable operation, the trigger should be driven
high before the end of timing cycle.
CC
A
= 9.1 k
= 5V
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FIGURE 2. Monostable Waveforms
Top Trace: Input 5V/Div.
Bottom Trace: Capacitor Voltage 2V/Div.
Middle Trace: Output 5V/Div.
CC
to avoid any possibility of false trig-
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DS007851-6