LM555J/883/NOPB National Semiconductor, LM555J/883/NOPB Datasheet - Page 7

• Manufacturer Part Number: LM555J/883/NOPB
• Manufacturer: National Semiconductor
• Type: Standardr

Specifications of LM555J/883/NOPB

• # Internal Timers: 1
• Power Dissipation: 1.18W
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5/9/12/15V
• Operating Supply Voltage (max): 18V
• Package Type: CDIP
• High Level Output Current: -200mA
• Low Level Output Current: 200mA
• Pin Count: 8
• Operating Temp Range: -55C to 125C
• Operating Temperature Classification: Military
• Mounting: Through Hole
• Lead Free Status / RoHS Status: Compliant

Applications Information
V
TIME = 20 µs/DIV. Middle Trace: Output 2V/Div.
R
C = 0.01 µF
PULSE WIDTH MODULATOR
When the timer is connected in the monostable mode and
triggered with a continuous pulse train, the output pulse
width can be modulated by a signal applied to pin 5. Figure
8 shows the circuit, and in Figure 9 are some waveform
examples.
V
TIME = 0.2 ms/DIV. Bottom Trace: Output Voltage 2V/Div.
R
C = 0.01 µF
PULSE POSITION MODULATOR
This application uses the timer connected for astable opera-
tion, as in Figure 10 , with a modulating signal again applied
to the control voltage terminal. The pulse position varies with
CC
CC
A
A
= 9.1 k
= 9.1 k
= 5V
= 5V
FIGURE 8. Pulse Width Modulator
FIGURE 9. Pulse Width Modulator
FIGURE 7. Frequency Divider
Top Trace: Input 4V/Div.
Top Trace: Modulation 1V/Div.
Bottom Trace: Capacitor 2V/Div.
(Continued)
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the modulating signal, since the threshold voltage and hence
the time delay is varied. Figure 11 shows the waveforms
generated for a triangle wave modulation signal.
V
TIME = 0.1 ms/DIV.
R
R
C = 0.01 µF
LINEAR RAMP
When the pullup resistor, R
placed by a constant current source, a linear ramp is gener-
ated. Figure 12 shows a circuit configuration that will perform
this function.
CC
A
B
= 3.9 k
= 3 k
= 5V
FIGURE 10. Pulse Position Modulator
FIGURE 11. Pulse Position Modulator
Top Trace: Modulation Input 1V/Div.
Bottom Trace: Output 2V/Div.
FIGURE 12.
A
, in the monostable circuit is re-
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