KS8737 Micrel Inc, KS8737 Datasheet - Page 5

• Manufacturer Part Number: KS8737
• Manufacturer: Micrel Inc

Specifications of KS8737

• Lead Free Status / RoHS Status: Not Compliant

Pin Description
Note 1.
August 2003
KS8737
31, 43, 52, 63
Pin Number
10, 22, 26,
24, 37, 53
17,35, 36
9, 19,
11
12
13
14
15
16
33
18
20
1
2
3
4
5
6
7
8
P = power supply
G = ground
I = input
O = output
I/O = bi-directional
DISTX/LPBK
PWRSAVE/
FXSD_THD
Pin Name
PHYAD4
PHYAD3
PHYAD2
PHYAD1
PHYAD0
INTRPT
MODE0
MODE1
RXENB
RSTB*
FXSD
GND
CRS
VDD
FDX
NC
X2
X1
Type
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
(Note 1)
P
O
I
I
I
I
I
Pin Function
MII Carrier Sense Output. Active High. High impedance when PHY is isolated.
I/O Interrupt Output. This pin requires an external 10k pull-up resistor. This pin
becomes an I/O pin for factory testing in the test mode.
MII Receive Enable Input. Active Low. If this pin is High, the Receive output of
MII (RXD[3:0], RXDV, RXER, RXC) will be in tri-state. This pin becomes an I/O
pin for factory testing in the test mode.
PHY Address Bit [4] Input. This pin becomes an I/O pin for factory testing in the
test mode.
PHY Address Bit [3] Input. This pin becomes an I/O pin for factory testing in the
test mode.
PHY Address Bit [2] Input. This pin becomes an I/O pin for factory testing in the
test mode.
PHY Address Bit [1] Input. This pin becomes an I/O pin for factory testing in the
test mode.
PHY Address Bit [0] Input. This pin becomes an I/O pin for factory testing in the
test mode.
3.3V power supply
Ground.
Crystal Oscillator Output. This pin is connected to the other terminal of the
25MHz crystal. If X1 is driven by an external clock, X2 must be left open.
Crystal Oscillator Input. Input for a crystal or an external 25MHz clock.
Full-Duplex Input. If this pin is High, it sets full-duplex operation. If this pin is Low,
it sets half duplex operation. The input signal of this pin is latched at reset. After
reset, this pin becomes test pin for factory test.
Mode Select Input. These pins carry encoded input signals that are latched at
reset and power up to set mode of operation. After reset, they become test pins
for factory test. These pins are I/O pins in the test mode.
Hardware Reset Input. Active Low signal. It forces the device to a known state.
Internal 100k pull-up.
No Connect.
Disable transmit Input. If this pin is high, it disables transmit only during the Media
converter mode. Floating is for normal operation. The DISTX/LPBK pin also
selects several functions together with the TST2 pin.
LPBK/DISTX
High
High
Low
Low
Fiber Signal Detect. To detect fiber signal. Left open when not in use.
Power Saving Mode Initialization Input. (Affecting Register 1f.15). To disable
power saving mode, tie this pin low; otherwise, power saving mode is asserted.
This pin can also be used to set FX signal detect threshold in fiber mode.
5
TST2
High
Float
High
Float
Disable Transmit
Local Loopback
Remote Loopback
Remote Loopback
KS8737
Micrel