SI3215-C-GMR Silicon Laboratories Inc, SI3215-C-GMR Datasheet - Page 101
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SI3215-C-GMR
Manufacturer Part Number
SI3215-C-GMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI3215-C-GMR.pdf
(118 pages)
Specifications of SI3215-C-GMR
Lead Free Status / RoHS Status
Compliant
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4. Indirect Registers
Indirect registers are not directly mapped into memory but are accessible through the IDA and IAA registers. A
write to IDA followed by a write to IAA is interpreted as a write request to an indirect register. In this case, the
contents of IDA are written to indirect memory at the location referenced by IAA at the next indirect register update.
A write to IAA without first writing to IDA is interpreted as a read request from an indirect register. In this case, the
value located at IAA is written to IDA at the next indirect register update. Indirect registers are updated at a rate of
16 kHz. For pending indirect register transfers, IAS (direct Register 31) will be one until serviced. In addition an
interrupt, IND (Register 20), can be generated upon completion of the indirect transfer.
Register
Indirect
Si3210
13
14
15
16
17
18
19
20
21
22
26
Register
Indirect
Si3215
13
0
1
2
3
4
5
6
7
8
9
Table 34. Si3210 to Si3215 Indirect Register Cross Reference
Register
Indirect
OSC1X
OSC1Y
OSC2X
OSC2Y
RNGX
RNGY
DACG
Name
OSC1
OSC2
ROFF
RCO
Register
Indirect
Si3210
27
28
29
30
31
32
33
34
35
36
37
Register
Rev. 0.92
Indirect
Si3215
14
15
16
17
18
19
20
21
22
23
24
Register
Indirect
PPT12
PPT34
PPT56
ADCG
Name
RPTP
NCLR
NRTP
LCRT
NQ12
CMH
CML
Register
Indirect
Si3210
100
101
102
103
104
38
39
40
41
43
99
Register
Indirect
Si3215
25
26
27
64
66
69
70
71
72
73
74
Si3215
Register
Indirect
VMIND
LCRTL
FSK0X
FSK1X
FSK01
FSK10
VCMR
Name
NQ34
NQ56
FSK0
FSK1
101
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