XC5VLX50T-1FFG665C Xilinx Inc, XC5VLX50T-1FFG665C Datasheet - Page 90

FPGA, VIRTEX-5 LXT, 50K, 665FCBGA

XC5VLX50T-1FFG665C

Manufacturer Part Number
XC5VLX50T-1FFG665C
Description
FPGA, VIRTEX-5 LXT, 50K, 665FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr

Specifications of XC5VLX50T-1FFG665C

No. Of Logic Blocks
7200
Family Type
Virtex-5
No. Of Speed Grades
1
Total Ram Bits
2211840
No. Of I/o's
360
Clock Management
DCM, PLL
I/o Supply Voltage
3.3V
Operating Frequency Max
550MHz
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
665-BBGA, FCBGA
Core Supply Voltage Range
1V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
122-1565

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Bonase Electronics (HK) Co., Limited Bonase Electronics (HK) Co., Limited
Part Number:
XC5VLX50T-1FFG665C4060
Manufacturer:
XILINX
Quantity:
1 122
Price:
DS202 (v5.3) May 5, 2010
Product Specification
03/31/08
04/25/08
05/09/08
05/15/08
06/12/08
06/18/08
06/26/08
09/23/08
Date
Version
4.0
4.1
4.2
4.3
4.4
4.5
4.6
4.7
• Added XC5VFX30T, XC5VFX70T, XC5VFX100T, XC5VFX130T, XC5VFX200T devices to appropriate
• Updated
• Added
• Corrected MGTAVCC in
• Updated MGTR
• Changed the symbol names to F
• Moved the
• Added notes to
• Revised speed specification version to 1.59.
• Added XC5VSX240T to appropriate tables.
• Clarified maximum frequency descriptions in
• Added Maximum Readback Frequency (F
• Revised speed specification version to 1.60.
• Revised
• Revised some V
• Reversed the order of the setup/hold values for T
• Added Package Skew values to
• Revised
• Added values to some devices in
• Increased the maximum V
• Revised V
• Added values to
• Updated
• In
• Revised XC5VLX20T, XC5VLX155, XC5VLX155T, XC5VFX30T, XC5VFX70T, XC5VFX100T,
• Added values to
• Added values to
• Moved XC5VLX20T to production in
• Updated the F
• Added XC5VTX150T and XC5VTX240T devices to appropriate tables.
• Added values to
• Updated data in
• Moved XC5VLX20T to production in
• Added note 8 to
• Added note 1 to
tables.
Table
Switching
Output Delay
page
transceivers in
XC5VFX130T, and some XC5VSX240T values in
Table
Table
38.
70.
47.
GTX_DUAL Tile Specifications
71, revised T
Ethernet MAC Switching Characteristics
Table 12, page
Power-On Power Supply Requirements, page
Table 54
Characteristics.
IDIFF
CRC Block Switching Characteristics
Measurements. Revised some V
OUTMAX
Table
and V
REF
Table
MEAS
Table
Table 68, page
Table 74, page
Table
Table
Table
Table 4
and
in
41,
ISE
BCCK0_0
53.
values and added note 6 to
Table 26, page
38,
43.
Table 55
5.
5.
in
9.
Table 24, page
and
in
Figure
Table
IN
Table
www.xilinx.com
Table
in
Table
, T
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
Table 28, page
74.
with production status on some devices.
8, and
47.
55.
Table 99, page
BGCK0_0
39,
GTPTX
29,
Table
5.
Table
Table 54
Table 54
Figure
13.
and
Figure 9, page
in
4.
13.
. In
Table 34
RBCCK
40,
PowerPC 440 Switching
3, and
Table
Revision
Table 68, page
and
and
Table
MEAS
14.
84.
) to SelectMAP Mode Programming Switching in
to
PLLCCK_REL
and added
Table 84
Table 58, page
73, revised T
Table
Table
and F
Figure 4, page
Table 48, page
41,
and R
21.
6.
Table
55.
55.
GTPRX
REF
through
47.
/T
Endpoint Block for PCI Express Designs
42,
values and added note 4 to
PLLCKC_REL
BRCKO_O
in
37. Added
Table
Table
15. Same change for GTX
25.
Table
Characteristicssections.
44,
, and T
35.
98.
in
Table
Figure 12, page 38
Table 75, page
BRCKO_O_BYP
45,
Table
Table 59,
46, and
.
56.
to
90

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