PIC16F1507-I/ML Microchip Technology, PIC16F1507-I/ML Datasheet - Page 101
![3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE](/photos/16/3/160361/qfn20_sml.jpg)
PIC16F1507-I/ML
Manufacturer Part Number
PIC16F1507-I/ML
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F1507-EML.pdf
(266 pages)
2.PIC16F1507-EML.pdf
(26 pages)
3.PIC16F1507-EML.pdf
(40 pages)
Specifications of PIC16F1507-I/ML
Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1507-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC16(L)F1507
11.2
PORTA is a 6-bit wide, bidirectional port. The
corresponding data direction register is TRISA
(Register
corresponding PORTA pin an input (i.e., disable the
output driver). Clearing a TRISA bit (= 0) will make the
corresponding PORTA pin an output (i.e., enables
output driver and puts the contents of the output latch
on the selected pin). The exception is RA3, which is
input only and its TRIS bit will always read as ‘1’.
Example 11-1
Reading the PORTA register
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then
written to the PORT data latch (LATA).
The TRISA register
PORTA pin output drivers, even when they are being
used as analog inputs. The user should ensure the bits
in the TRISA register are maintained set when using
them as analog inputs. I/O pins configured as analog
input always read ‘0’.
11.2.1
The ANSELA register
configure the Input mode of an I/O pin to analog.
Setting the appropriate ANSELA bit high will cause all
digital reads on the pin to be read as ‘0’ and allow
analog functions on the pin to operate correctly.
The state of the ANSELA bits has no effect on digital
output functions. A pin with TRIS clear and ANSEL set
will still operate as a digital output, but the Input mode
will be analog. This can cause unexpected behavior
when executing read-modify-write instructions on the
affected port.
EXAMPLE 11-1:
DS41586A-page 101
BANKSEL
CLRF
BANKSEL
CLRF
BANKSEL
CLRF
BANKSEL
MOVLW
MOVWF
Note:
PORTA Registers
11-3). Setting a TRISA bit (= 1) will make the
PORTA
PORTA
LATA
LATA
ANSELA
ANSELA
TRISA
B'00111000' ;Set RA<5:3> as inputs
TRISA
ANSELA REGISTER
The ANSELA bits default to the Analog
mode after Reset. To use any pins as
digital general purpose or peripheral
inputs, the corresponding ANSEL bits
must be initialized to ‘0’ by user software.
shows how to initialize an I/O port.
INITIALIZING PORTA
(Register
(Register
;
;Init PORTA
;Data Latch
;
;
;digital I/O
;
;and set RA<2:0> as
;outputs
(Register
11-3) controls the
11-5) is used to
11-2) reads the
Preliminary
11.2.2
Each PORTA pin is multiplexed with other functions. The
pins, their combined functions and their output priorities
are shown in
When multiple outputs are enabled, the actual pin
control goes to the peripheral with the highest priority.
Analog input functions, such as ADC and comparator
inputs, are not shown in the priority lists. These inputs
are active when the I/O pin is set for Analog mode using
the ANSELx registers. Digital output functions may
control the pin when it is in Analog mode with the
priority shown below in
TABLE 11-2:
Note 1:
Pin Name
2:
RA0
RA1
RA2
RA3
RA4
RA5
Priority listed from highest to lowest.
Default pin (see APFCON register).
PORTA FUNCTIONS AND OUTPUT
PRIORITIES
Table
PORTA OUTPUT PRIORITY
11-2.
Table
2011 Microchip Technology Inc.
11-2.
Function Priority
ICSPDAT
RA0
RA1
CLC1
PWM3
RA2
None
CLKOUT
RA4
RA5
(2)
(1)
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