PIC16F1829-E/P Microchip Technology, PIC16F1829-E/P Datasheet - Page 142

14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P

PIC16F1829-E/P

Manufacturer Part Number
PIC16F1829-E/P
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 P
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet

Specifications of PIC16F1829-E/P

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC16F182x
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
18
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F/LF1825/1829
REGISTER 12-20: INLVLC: PORTC INPUT LEVEL CONTROL REGISTER
TABLE 12-5:
DS41440A-page 142
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
Note 1:
ANSELC
INLVLC
LATC
PORTC
TRISC
WPUC
Legend:
Note
INLVLC7
R/W-0/0
Name
1:
2:
(1)
INLVLC<7:6> available on PIC16F/LF1829 only. Otherwise, they are unimplemented and read as ‘0’.
PIC16F/LF1829 only.
PIC16F/LF1825 only.
x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTC.
INLVLC<7:0>: PORTC Input Level Select bits
For RC<7:0> pins, respectively
1 = ST input used for port reads and interrupt-on-change
0 = TTL input used for port reads and interrupt-on-change
INLVLC7
TRISC7
WPUC7
ANSC7
INLVLC6
LATC7
SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
RC7
R/W-0/0
Bit 7
(1)
(1)
(1)
(1)
(1)
(1)
(1)
INLVLC6
WPUC6
TRISC6
ANSC6
LATC6
RC6
Bit 6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
INLVLC5
R/W-0/0
(1)
(1)
(1)
(1)
(1)
(1)
INLVLC5
WPUC5
TRISC5
LATC5
Bit 5
RC5
INLVLC4
R/W-0/0
Preliminary
INLVLC4
TRISC4
WPUC4
LATC4
Bit 4
RC4
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
INLVLC3
R/W-0/0
(1)
INLVLC3
WPUC3
TRISC3
ANSC3
LATC3
Bit 3
RC3
INLVLC2
WPUC2
TRISC2
ANSC2
LATC2
INLVLC2
R/W-1/1
Bit 2
RC2
INLVLC1
TRISC1
WPUC1
ANSC1
 2010 Microchip Technology Inc.
LATC1
Bit 1
RC1
INLVLC1
R/W-0/0
INLVLC0
TRISC0
WPUC0
ANSC0
LATC0
Bit 0
RC0
INLVLC0
R/W-0/0
Register
on Page
136
142
135
135
135
136
bit 0

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