PIC16F726-E/ML Microchip Technology, PIC16F726-E/ML Datasheet - Page 42

14KB Flash Program, 1.8V-5.5V, 16MHz Internal Oscillator, 8b ADC, CCP, I2C/SPI,

PIC16F726-E/ML

Manufacturer Part Number
PIC16F726-E/ML
Description
14KB Flash Program, 1.8V-5.5V, 16MHz Internal Oscillator, 8b ADC, CCP, I2C/SPI,
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F726-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC16F72X/PIC16LF72X
TABLE 3-5:
TABLE 3-6:
DS41341E-page 42
STATUS
PCON
Legend:
Note 1:
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during Sleep
WDT Reset
WDT Wake-up
Brown-out Reset
Interrupt Wake-up from Sleep
Legend: u = unchanged, x = unknown,
Note 1:
Name
u = unchanged, x = unknown,
used by Resets.
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
When the wake-up is due to an interrupt and Global Interrupt Enable bit, GIE, is set, the PC is loaded with
the interrupt vector (0004h) after execution of PC + 1.
Bit 7
IRP
Condition
INITIALIZATION CONDITION FOR SPECIAL REGISTERS
SUMMARY OF REGISTERS ASSOCIATED WITH RESETS
Bit 6
RP1
Bit 5
RP0
-
= unimplemented bit, reads as ‘0’, q = value depends on condition. Shaded cells are not
-
Bit 4
TO
= unimplemented bit, reads as ‘0’.
Program
PC + 1
Counter
PC + 1
Bit 3
0000h
0000h
0000h
0000h
0000h
PD
(1)
Bit 2
Z
Bit 1
POR
DC
0001 1xxx
000u uuuu
0001 0uuu
0000 uuuu
uuu0 0uuu
0001 1xxx
uuu1 0uuu
Register
STATUS
Bit 0
BOR
C
© 2009 Microchip Technology Inc.
0001 1xxx
---- --qq
POR, BOR
Value on
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --10
---- --uu
Register
PCON
000q quuu
---- --uu
Resets
Value on
all other
(1)

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