PIC16LF1507-E/ML Microchip Technology, PIC16LF1507-E/ML Datasheet - Page 50
PIC16LF1507-E/ML
Manufacturer Part Number
PIC16LF1507-E/ML
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F1507-EML.pdf
(266 pages)
Specifications of PIC16LF1507-E/ML
Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
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5.3
The system clock source can be switched between
external and internal clock sources via software using
the System Clock Select (SCS) bits of the OSCCON
register. The following clock sources can be selected
using the SCS bits:
• Default system oscillator determined by FOSC
• Internal Oscillator Block (INTOSC)
TABLE 5-1:
2011 Microchip Technology Inc.
Switch From
Sleep/POR
Sleep/POR
LFINTOSC
Any clock source
Any clock source
bits in Configuration Words
Clock Switching
OSCILLATOR SWITCHING DELAYS
Switch To
LFINTOSC
HFINTOSC
EC
EC
HFINTOSC
LFINTOSC
Preliminary
Frequency
31 kHz
31.25 kHz-16 MHz
DC – 20 MHz
DC – 20 MHz
31.25 kHz-16 MHz
31 kHz
5.3.1
The System Clock Select (SCS) bits of the OSCCON
register selects the system clock source that is used for
the CPU and peripherals.
• When the SCS bits of the OSCCON register = 00,
• When the SCS bits of the OSCCON register = 1x,
When switching between clock sources, a delay is
required to allow the new clock to stabilize. These oscil-
lator delays are shown in
the system clock source is determined by value of
the FOSC<1:0> bits in the Configuration Words.
the system clock source is chosen by the internal
oscillator frequency selected by the IRCF<3:0>
bits of the OSCCON register. After a Reset, the
SCS bits of the OSCCON register are always
cleared.
SYSTEM CLOCK SELECT (SCS)
BITS
Oscillator Warm-up Delay (T
2 s (typical)
Oscillator Delay
2 cycles
1 cycle of each
1 cycle of each
PIC16(L)F1507
Table
5-2.
DS41586A-page 50
WARM
)
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