PIC16LF1507-E/ML Microchip Technology, PIC16LF1507-E/ML Datasheet - Page 84

3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE

PIC16LF1507-E/ML

Manufacturer Part Number
PIC16LF1507-E/ML
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet

Specifications of PIC16LF1507-E/ML

Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
10.2.1
To read a program memory location, the user must:
1.
2.
3.
Once the read control bit is set, the program memory
Flash controller will use the second instruction cycle to
read the data. This causes the second instruction
immediately following the “BSF PMCON1,RD” instruction
to be ignored. The data is available in the very next cycle,
in the PMDATH:PMDATL register pair; therefore, it can
be read as two bytes in the following instructions.
PMDATH:PMDATL register pair will hold this value until
another read or until it is written to by the user.
 2011 Microchip Technology Inc.
Note:
Write
PMADRH:PMADRL register pair.
Clear the CFGS bit of the PMCON1 register.
Then, set control bit RD of the PMCON1 register.
READING THE FLASH PROGRAM
MEMORY
The two instructions following a program
memory read are required to be NOPs.
This prevents the user from executing a
two-cycle
instruction after the RD bit is set.
the
desired
instruction
address
on
the
to
the
next
Preliminary
FIGURE 10-1:
Program or Configuration Memory
Instruction Fetched ignored
Instruction Fetched ignored
PIC16(L)F1507
Initiate Read operation
NOP execution forced
(PMADRH:PMADRL)
NOP execution forced
PMDATH:PMDATL
Data read now in
Read Operation
Read Operation
Word Address
FLASH PROGRAM
MEMORY READ
FLOWCHART
(RD = 1)
(CFGS)
Select
Select
Start
End
DS41586A-page 84

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