PIC16LF1518-E/SS Microchip Technology, PIC16LF1518-E/SS Datasheet - Page 218
PIC16LF1518-E/SS
Manufacturer Part Number
PIC16LF1518-E/SS
Description
28-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 1.8V-3.6V 2
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1517-IPT.pdf
(344 pages)
Specifications of PIC16LF1518-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC16LF151x
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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PIC16(L)F1516/7/8/9
21.6.4
To initiate a Start condition, the user sets the Start
Enable bit, SEN bit of the SSPCON2 register. If the
SDA and SCL pins are sampled high, the Baud Rate
Generator
SSPADD<7:0> and starts its count. If SCL and SDA
are both sampled high when the Baud Rate Generator
times out (T
of the SDA being driven low while SCL is high is the
Start condition and causes the S bit of the SSPSTAT1
register to be set. Following this, the Baud Rate Gen-
erator is reloaded with the contents of SSPADD<7:0>
and resumes its count. When the Baud Rate Genera-
tor times out (T
FIGURE 21-26:
DS41452A-page 218
I
CONDITION TIMING
2
C MASTER MODE START
BRG
is
BRG
), the SDA pin is driven low. The action
reloaded
), the SEN bit of the SSPCON2 reg-
FIRST START BIT TIMING
Write to SEN bit occurs here
with
SDA
SCL
the
contents
SDA = 1,
SCL = 1
T
BRG
Preliminary
of
S
Set S bit (SSPSTAT<3>)
T
BRG
At completion of Start bit,
hardware clears SEN bit
ister will be automatically cleared by hardware; the
Baud Rate Generator is suspended, leaving the SDA
line held low and the Start condition is complete.
and sets SSPIF bit
Note 1: If at the beginning of the Start condition,
Write to SSPBUF occurs here
T
BRG
2: The Philips I
1st bit
the SDA and SCL pins are already sam-
pled low, or if during the Start condition,
the SCL line is sampled low before the
SDA line is driven low, a bus collision
occurs, the Bus Collision Interrupt Flag,
BCLIF, is set, the Start condition is
aborted and the I
its Idle state.
bus collision cannot occur on a Start.
T
BRG
2010 Microchip Technology Inc.
2
C Specification states that a
2nd bit
2
C module is reset into
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