PIC16LF1939-E/PT Microchip Technology, PIC16LF1939-E/PT Datasheet - Page 144

• Manufacturer Part Number: PIC16LF1939-E/PT
• Description: 28KB Flash, 1KB RAM, 256B EEPROM, LCD, NanoWatt XLP 44 TQFP 10x10x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1939-E/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 28KB (16K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F193X/LF193X
REGISTER 12-17: ANSELD: PORTD ANALOG SELECT REGISTER
TABLE 12-5:
DS41364D-page 144
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
Note 1:
ANSELD
CCPxCON
CPSCON0
CPSCON1
LATD
LCDCON
LCDSE2
PORTD
TRISD
Legend:
Note 1:
R/W-1/1
ANSD7
Name
2:
3:
2:
When setting a pin to an analog input, the corresponding TRIS bit must be set to Input mode in order to
allow external control of the voltage on the pin.
ANSELD register is not implemented on the PIC16F1933/1936/1938. Read as ‘0’.
PORTD implemented on PIC16F1934/1937/1939/PIC16LF1934/1937/1939 devices only.
x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTD.
These registers are not implemented on the PIC16F1933/1936/1938 devices, read as ‘0’.
The Capacitive Sensing Reference Mode (CPSRM) bit is not available for the PIC16F/LF1934/1936 devices.
ANSD<7:0>: Analog Select between Analog or Digital Function on Pins RD<7:0>, respectively
0 = Digital I/O. Pin is assigned to port or digital special function.
1 = Analog input. Pin is assigned as analog input
CPSON
TRISD7
ANSD7
LCDEN
LATD7
SE23
Bit 7
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
RD7
R/W-1/1
ANSD6
—
PxM<1:0>
CPSRM
TRISD6
ANSD6
SLPEN
LATD6
SE22
Bit 6
RD6
—
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-1/1
ANSD5
(2)
TRISD5
ANSD5
LATD5
WERR
SE21
Bit 5
RD5
—
—
DCxB<1:0>
R/W-1/1
ANSD4
TRISD4
Preliminary
ANSD4
LATD4
SE20
Bit 4
RD4
—
—
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
TRISD3
ANSD3
R/W-1/1
LATD3
ANSD3
SE19
Bit 3
RD3
CPSRNG<1:0>
(1)
CS<1:0>
. Digital input buffer disabled.
TRISD2
ANSD2
LATD2
SE18
Bit 2
RD2
CPSCH<3:0>
CCPxM<3:0>
R/W-1/1
ANSD2
(2)
CPSOUT
(1)
TRISD1
ANSD1
LATD1
SE17
Bit 1
RD1
 2009 Microchip Technology Inc.
LMUX<1:0>
R/W-1/1
ANSD1
TRISD0
ANSD0
T0XCS
LATD0
SE16
Bit 0
RD0
Register on
R/W-1/1
ANSD0
Page
144
231
323
324
143
329
333
143
143
bit 0