PIC18F1230-E/ML Microchip Technology, PIC18F1230-E/ML Datasheet - Page 172

Microcontroller

PIC18F1230-E/ML

Manufacturer Part Number
PIC18F1230-E/ML
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F1230-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
 Details
PIC18F1230/1330
The analog reference voltage is software selectable to
the device’s positive supply voltage (V
voltage level on the RA4/T0CKI/AN2/V
The A/D Converter has a unique feature of being able
to operate while the device is in Sleep mode. To
operate in Sleep, the A/D conversion clock must be
derived from the A/D Converter’s internal RC oscillator.
The output of the sample and hold is the input into the
A/D Converter, which generates the result via succes-
sive approximation.
FIGURE 16-1:
DS39758D-page 172
Converter
10-Bit
A/D
Reference
A/D BLOCK DIAGRAM
Voltage
REF
V
REF
DD
+ pin.
+
), or the
(Input Voltage)
V
VCFG0
AIN
0
1
AV
AV
complete,
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted.
Each port pin associated with the A/D Converter can be
configured as an analog input or as a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is
ADRESH:ADRESL register pair, the GO/DONE bit
(ADCON0 register) is cleared and A/D Interrupt Flag bit,
ADIF, is set. The block diagram of the A/D module is
shown in Figure 16-1.
DD
SS
the
CHS1:CHS0
result
0011
0010
0001
0000
 2009 Microchip Technology Inc.
is
loaded
AN3
AN2
AN1
AN0
into
the

Related parts for PIC18F1230-E/ML