PIC18F13K50T-I/SS Microchip Technology, PIC18F13K50T-I/SS Datasheet - Page 107

8 KB Flash, 512 RAM, 15 I/O, 10-bit ADC, USB 2.0 20 SSOP .209in T/R

PIC18F13K50T-I/SS

Manufacturer Part Number
PIC18F13K50T-I/SS
Description
8 KB Flash, 512 RAM, 15 I/O, 10-bit ADC, USB 2.0 20 SSOP .209in T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F13K50T-I/SS

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART, I2C, MSSP, SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPP
Lead Free Status / Rohs Status
 Details
11.2
Timer1 can be configured for 16-bit reads and writes
(see
T1CON register is set, the address for TMR1H is
mapped to a buffer register for the high byte of Timer1.
A read from TMR1L will load the contents of the high
byte of Timer1 into the Timer1 high byte buffer. This
provides the user with the ability to accurately read all
16 bits of Timer1 without the need to determine
whether a read of the high byte, followed by a read of
the low byte, has become invalid due to a rollover or
carry between reads.
Writing to TMR1H does not directly affect Timer1.
Instead, the high byte of Timer1 is updated with the
contents of TMR1H when a write occurs to TMR1L.
This allows all 16 bits of Timer1 to be updated at once.
The high byte of Timer1 is not directly readable or
writable in this mode. All reads and writes must take
place through the Timer1 High Byte Buffer register.
Writes to TMR1H do not clear the Timer1 prescaler.
The prescaler is only cleared on writes to TMR1L.
11.3
An on-chip crystal oscillator circuit is incorporated
between pins T1OSI (input) and T1OSO (amplifier
output). It is enabled by setting the Timer1 Oscillator
Enable bit, T1OSCEN of the T1CON register. The
oscillator is a low-power circuit rated for 32 kHz crystals.
It will continue to run during all power-managed modes.
The circuit for a typical LP oscillator is shown in
Figure
the Timer1 oscillator.
The user must provide a software time delay to ensure
proper start-up of the Timer1 oscillator.
FIGURE 11-3:
 2010 Microchip Technology Inc.
Note:
Figure
11-3.
Timer1 16-Bit Read/Write Mode
Timer1 Oscillator
27 pF
27 pF
C1
C2
Table 11-1
See the Notes with
information about capacitor selection.
11-2). When the RD16 control bit of the
32.768 kHz
XTAL
EXTERNAL
COMPONENTS FOR THE
TIMER1 LP OSCILLATOR
shows the capacitor selection for
T1OSI
T1OSO
Table 11-1
PIC
®
MCU
for additional
Preliminary
TABLE 11-1:
11.3.1
The Timer1 oscillator is also available as a clock source
in power-managed modes. By setting the clock select
bits, SCS<1:0> of the OSCCON register, to ‘01’, the
device switches to SEC_RUN mode; both the CPU and
peripherals are clocked from the Timer1 oscillator. If the
IDLEN bit of the OSCCON register is cleared and a
SLEEP instruction is executed, the device enters
SEC_IDLE mode. Additional details are available in
Section 19.0 “Power-Managed
Whenever the Timer1 oscillator is providing the clock
source, the Timer1 system clock status flag, T1RUN of
the T1CON register, is set. This can be used to deter-
mine the controller’s current clocking mode. It can also
indicate which clock source is currently being used by
the Fail-Safe Clock Monitor. If the Clock Monitor is
enabled and the Timer1 oscillator fails while providing
the clock, polling the T1RUN bit will indicate whether
the clock is being provided by the Timer1 oscillator or
another source.
Osc Type
Note 1: Microchip suggests these values only as
LP
2: Higher capacitance increases the stabil-
3: Since each resonator/crystal has its own
4: Capacitor values are for design guidance
PIC18F/LF1XK50
USING TIMER1 AS A
CLOCK SOURCE
a starting point in validating the oscillator
circuit.
ity of the oscillator but also increases the
start-up time.
characteristics, the user should consult
the resonator/crystal manufacturer for
appropriate values of external
components.
only.
32 kHz
Freq
CAPACITOR SELECTION FOR
THE TIMER OSCILLATOR
27 pF
C1
Modes”.
DS41350E-page 107
(1)
27 pF
C2
(1)

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