PIC18F13K50T-I/SS Microchip Technology, PIC18F13K50T-I/SS Datasheet - Page 285

• Manufacturer Part Number: PIC18F13K50T-I/SS
• Description: 8 KB Flash, 512 RAM, 15 I/O, 10-bit ADC, USB 2.0 20 SSOP .209in T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F13K50T-I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPP
• Lead Free Status / Rohs Status: Details

TABLE 23-4:
 2010 Microchip Technology Inc.
TOSU
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INTCON3
INDF0
POSTINC0
POSTDEC0
PREINC0
PLUSW0
FSR0H
FSR0L
WREG
INDF1
POSTINC1
POSTDEC1
PREINC1
PLUSW1
Legend:
Note 1:
Register
2:
3:
4:
5:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hard-
ware stack.
See
All bits of the ANSELH register initialize to ‘0’ if the PBADEN bit of CONFIG3H is ‘0’.
Table 23-3
INITIALIZATION CONDITIONS FOR ALL REGISTERS
Address
FEDh
FECh
FFFh
FFEh
FFDh
FFCh
FFBh
FFAh
FEFh
FEEh
FEBh
FEAh
FE9h
FE8h
FE7h
FE6h
FE5h
FE4h
FE3h
FF9h
FF8h
FF7h
FF6h
FF5h
FF4h
FF3h
FF2h
FF1h
FF0h
for Reset value for specific condition.
Brown-out Reset
Power-on Reset,
---0 0000
0000 0000
0000 0000
00-0 0000
---0 0000
0000 0000
0000 0000
---0 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 000x
1111 -1-1
11-0 0-00
---- 0000
xxxx xxxx
xxxx xxxx
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Preliminary
RESET Instruction,
MCLR Resets,
Stack Resets
WDT Reset,
---0 0000
0000 0000
0000 0000
uu-0 0000
---0 0000
0000 0000
0000 0000
---0 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 000u
1111 -1-1
11-0 0-00
---- 0000
uuuu uuuu
uuuu uuuu
PIC18F/LF1XK50
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Wake-up via WDT
---0 uuuu
uuuu uuuu
uuuu uuuu
uu-u uuuu
uuuu uuuu
uuuu -u-u
uu-u u-uu
or Interrupt
---u uuuu
uuuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- uuuu
uuuu uuuu
uuuu uuuu
DS41350E-page 285
PC + 2
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
(2)
(3)
(3)
(3)
(3)
(1)
(1)
(1)