PIC18F4553-I/ML Microchip Technology, PIC18F4553-I/ML Datasheet
PIC18F4553-I/ML
Specifications of PIC18F4553-I/ML
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PIC18F4553-I/ML Summary of contents
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... PIC18F2458/2553/4458/4553 Enhanced Flash, USB Microcontrollers with 12-Bit A/D and nanoWatt Technology © 2009 Microchip Technology Inc. 28/40/44-Pin High-Performance, Data Sheet DS39887C ...
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... REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... PIC18F2458 24K 12288 PIC18F2553 32K 16384 PIC18F4458 24K 12288 PIC18F4553 32K 16384 © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 Flexible Oscillator Structure: • Four Crystal modes, Including High-Precision PLL for USB • Two External Clock modes MHz • Internal Oscillator Block: ...
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... USB REF USB RB7/KBI3/PGD RB6/KBI2/PGC RB5/KBI1/PGM RB4/AN11/KBI0 (1) RB3/AN9/CCP2 /VPO RB2/AN8/INT2/VMO RB1/AN10/INT1/SCK/SCL RB0/AN12/INT0/FLT0/SDI/SDA RC7/RX/DT/SDO RC6/TX/CK RC5/D+/VP RC4/D-/VM RB7/KBI3/PGD RB6/KBI2/PGC RB5/KBI1/PGM RB4/AN11/KBI0/CSSPP (1) RB3/AN9/CCP2 /VPO RB2/AN8/INT2/VMO RB1/AN10/INT1/SCK/SCL RB0/AN12/INT0/FLT0/SDI/SDA RD7/SPP7/P1D RD6/SPP6/P1C RD5/SPP5/P1B RD4/SPP4 RC7/RX/DT/SDO RC6/TX/CK RC5/D+/VP RC4/D-/VM RD3/SPP3 RD2/SPP2 © 2009 Microchip Technology Inc. ...
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... Special ICPORT features are available only in 44-pin TQFP packages. See Section 25.9 “Special ICPORT Features” in the “PIC18F2455/2550/4455/4550 Data Sheet”’. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 PIC18F4458 28 6 PIC18F4553 RD4/SPP4 2 RD5/SPP5/P1B 3 RD6/SPP6/P1C 4 PIC18F4458 RD7/SPP7/P1D PIC18F4553 (2) PP (2) NC/ICRST /ICV RC0/T1OSO/T13CKI OSC2/CLKO/RA6 OSC1/CLKI RE2/AN7/OESPP RE1/AN6/CK2SPP RE0/AN5/CK1SPP RA5/AN4/SS/HLVDIN/C2OUT RA4/T0CKI/C1OUT/RCV 33 OSC2/CLKO/RA6 32 OSC1/CLKI ...
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... When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are using. Customer Notification System Register on our web site at www.microchip.com to receive the most current information on all of our products. DS39887C-page 6 © 2009 Microchip Technology Inc. ...
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... These are summarized in Table 1-1. The pinouts for all devices are listed in Table 1-2 and Table 1-3. Members of the PIC18F4553 family are available as both standard and low-voltage devices. Standard devices with Enhanced Flash memory, designated with an “F” in the part number (such as PIC18F2458), accommodate an operating V Low-voltage parts, designated by “ ...
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... RESET Instruction, Stack Full, Stack Underflow, MCLR (optional), (PWRT, OST) Yes Yes Yes Yes 75 Instructions; 83 with Extended Instruction Set Enabled Enabled 28-Pin SPDIP 28-Pin SOIC PIC18F2550 PIC18F4458 PIC18F4553 DC – 48 MHz DC – 48 MHz 24576 32768 12288 16384 2048 2048 256 256 20 20 Ports ...
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... RE3 is multiplexed with MCLR and is only available when the MCLR Resets are disabled. 2: OSC1/CLKI and OSC2/CLKO are only available in select oscillator modes and when these pins are not being used as digital I/O. 3: RB3 is the alternate pin for CCP2 multiplexing. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 Data Bus<8> Data Latch 8 ...
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... RA3/AN3/V + REF RA4/T0CKI/C1OUT/RCV RA5/AN4/SS/HLVDIN/C2OUT OSC2/CLKO/RA6 PORTB RB0/AN12/INT0/FLT0/SDI/SDA RB1/AN10/INT1/SCK/SCL RB2/AN8/INT2/VMO (4) RB3/AN9/CCP2 /VPO RB4/AN11/KBI0/CSSPP RB5/KBI1/PGM RB6/KBI2/PGC RB7/KBI3/PGD PORTC RC0/T1OSO/T13CKI (4) RC1/T1OSI/CCP2 /UOE RC2/CCP1/P1A RC4/D-/VM RC5/D+/VP RC6/TX/CK RC7/RX/DT/SDO PORTD RD0/SPP0:RD4/SPP4 RD5/SPP5/P1B RD6/SPP6/P1C RD7/SPP7/P1D PORTE RE0/AN5/CK1SPP RE1/AN6/CK2SPP RE2/AN7/OESPP (1) MCLR/V /RE3 PP USB © 2009 Microchip Technology Inc. ...
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... ST = Schmitt Trigger input with CMOS levels O = Output Note 1: Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared. 2: Default assignment for CCP2 when CCP2MX Configuration bit is set. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 Pin Buffer Type Master Clear (input) or programming voltage (input Master Clear (Reset) input ...
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... External USB transceiver RCV input. I/O TTL Digital I/O. I Analog Analog input 4. I TTL SPI slave select input. I Analog High/Low-Voltage Detect input. O — Comparator 2 output. — — See the OSC2/CLKO/RA6 pin. CMOS = CMOS compatible input or output I = Input P = Power Description © 2009 Microchip Technology Inc. ...
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... O = Output Note 1: Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared. 2: Default assignment for CCP2 when CCP2MX Configuration bit is set. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 Pin Buffer Type PORTB is a bidirectional I/O port. PORTB can be software programmed for internal weak pull-ups on all inputs. ...
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... When the internal USB regulator is disabled, V power input for the USB transceiver. P — Ground reference for logic and I/O pins. P — Positive supply for logic and I/O pins. CMOS = CMOS compatible input or output I = Input P = Power Description is the USB is the USB © 2009 Microchip Technology Inc. ...
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... Default assignment for CCP2 when CCP2MX Configuration bit is set. 3: These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No Connect unless ICPRT is set and the DEBUG Configuration bit is cleared. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 Pin Buffer ...
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... External USB transceiver RCV input. 24 I/O TTL Digital I/O. I Analog Analog input 4. I TTL SPI slave select input. I Analog High/Low-Voltage Detect input. O — Comparator 2 output. — — — See the OSC2/CLKO/RA6 pin. CMOS = CMOS compatible input or output I = Input P = Power Description © 2009 Microchip Technology Inc. ...
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... Default assignment for CCP2 when CCP2MX Configuration bit is set. 3: These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No Connect unless ICPRT is set and the DEBUG Configuration bit is cleared. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 Pin Buffer ...
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... I/O ST Digital I/O. O — EUSART asynchronous transmit. I/O ST EUSART synchronous clock (see RX/DT). 1 I/O ST Digital I/ EUSART asynchronous receive. I/O ST EUSART synchronous data (see TX/CK). O — SPI data out. CMOS = CMOS compatible input or output I = Input P = Power Description © 2009 Microchip Technology Inc. ...
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... Default assignment for CCP2 when CCP2MX Configuration bit is set. 3: These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No Connect unless ICPRT is set and the DEBUG Configuration bit is cleared. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 Pin Buffer ...
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... No Connect or dedicated ICD/ICSP port Reset. I — Master Clear (Reset) input. P — Programming voltage input — No Connect or 28-pin device emulation. Enable 28-pin device emulation when connected — — — No Connect. CMOS = CMOS compatible input or output I = Input P = Power Description is USB USB © 2009 Microchip Technology Inc. ...
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... Note 1: These channels are not implemented on 28-pin devices. 2: Performing a conversion on unimplemented channels will return a floating input measurement. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 The ADCON0 register, shown in Register 2-1, controls the operation of the A/D module. The ADCON1 register, shown in Register 2-2, configures the functions of the port pins ...
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... AN5 through AN7 are available only on 40-pin and 44-pin devices. DS39887C-page 22 R/W-0 R/W-0 R/W VCFG0 PCFG3 PCFG2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared - source) REF + source) REF Digital I/O (1) (1) (1) R/W R/W PCFG1 PCFG0 bit Bit is unknown © 2009 Microchip Technology Inc. ...
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... F /2 OSC Note 1: If the A/D F clock source is selected, a delay of one T RC clock starts. This allows the SLEEP instruction to be executed before starting a conversion. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 R/W-0 R/W-0 R/W-0 ACQT1 ACQT0 ADCS2 U = Unimplemented bit, read as ‘0’ ...
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... A/D module is shown in Figure 2-1. CHS3:CHS0 V AIN (Input Voltage) VCFG1:VCFG0 REF REF 1100 AN12 1011 AN11 1010 AN10 1001 AN9 1000 AN8 0111 (1) AN7 0110 (1) AN6 0101 (1) AN5 0100 AN4 0011 AN3 0010 AN2 0001 AN1 0000 AN0 © 2009 Microchip Technology Inc. ...
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... SS = Sampling Switch C = Sample/Hold Capacitance (from DAC) HOLD R = Sampling Switch Resistance SS © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 5. Wait for A/D conversion to complete, by either: • Polling for the GO/DONE bit to be cleared OR • Waiting for the A/D interrupt 6. Read A/D Result registers (ADRESH:ADRESL); ...
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... T based assumptions: ). The DD C HOLD Rs Conversion Error V DD Temperature (- HOLD ln(1/4096) S COFF ) ln(1/4096) µs . This calculation is ACQ the following application system = 2.5 kΩ ≤ 1/2 LSb 3V → Rss = 4 kΩ 85°C (system max µs. © 2009 Microchip Technology Inc. ...
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... The RC source has a typical T 2: For device frequencies above 1 MHz, the device must be in Sleep for the entire conversion divider should be used instead; otherwise, the A/D accuracy specification may not be met. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 2.3 Selecting the A/D Conversion ...
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... The clock to RC Register 3H configures PORTB pins to reset as analog or digital pins by control- ling how the PCFG3:PCFG0 bits in ADCON1 are reset. ) will be converted. OL PBADEN bit in Configuration © 2009 Microchip Technology Inc. ...
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... Conversion starts Time (Holding capacitor is disconnected) Set GO/DONE bit (Holding capacitor continues acquiring input) © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 After the A/D conversion is completed or aborted wait is required before the next acquisition can CY be started. After this wait, acquisition on the selected channel is automatically started ...
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... Values on Page: (4) INT0IF RBIF (4) TMR2IF TMR1IF (4) TMR2IE TMR1IE (4) TMR2IP TMR1IP (4) TMR3IF CCP2IF (4) TMR3IE CCP2IE (4) TMR3IP CCP2IP (4) (4) GO/DONE ADON 21 PCFG1 PCFG0 22 ADCS1 ADCS0 23 (4) RA1 RA0 (4) (4) RB1 RB0 (4) (4) (1) (1) (1) (4) RE1 RE0 (4) TRISE1 TRISE0 (4) © 2009 Microchip Technology Inc. ...
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... Legend unknown unchanged Note 1: See Register 3-1 and Register 3-2 for DEVID values. DEVID registers are read-only and cannot be programmed by the user. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 3.1 Device ID Registers The Device ID registers are “read-only” registers. They identify the device type and revision to device ...
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... U = Unimplemented bit, read as ‘0’ Unchanged from programmed state DEV7 DEV6 DEV5 U = Unimplemented bit, read as ‘0’ Unchanged from programmed state DEV2:DEV0 (DEVID1<7:5>) 011 010 001 000 R R REV1 REV0 bit DEV4 DEV3 bit 0 Device PIC18F2458 PIC18F2553 PIC18F4458 PIC18F4553 © 2009 Microchip Technology Inc. ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 (except V and MCLR) ...
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... For 2.0V ≤ V < 4.2V For 4.2V ≤ MHz DD MAX Note the minimum voltage of the PIC DDAPPMIN DS39887C-page 34 PIC18F2458/2553/4458/4553 Frequency PIC18LF2458/2553/4458/4553 Frequency = (16.36 MHz/V) (V – 2.0V MHz MAX DDAPPMIN ® device in the application. 4.2V 48 MHz 4.2V 40 MHz 48 MHz © 2009 Microchip Technology Inc. ...
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... REF Note 1: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes current is from the RA3/AN3/V REFH V current is from the RA2/AN2/V REFL © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 PIC18LF2458/2553/4458/4553 (INDUSTRIAL) Min Typ Max Units — — 12 bit — ...
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... The source impedance ( NEW_DATA T CY DONE Units Conditions μs ≥ 3.0V T based, V OSC REF μ 3.0V based, V full range OSC REF μs A/D RC mode μ 3.0V; A/D RC mode μs μs clock divider the input channels is 50Ω. S © 2009 Microchip Technology Inc. ...
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... PACKAGING INFORMATION For packaging information, see the “PIC18F2455/ 2550/4455/4550 Data Sheet” (DS39632). © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 DS39887C-page 37 ...
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... PIC18F2458/2553/4458/4553 NOTES: DS39887C-page 38 © 2009 Microchip Technology Inc. ...
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... Ports ( Input Channels 28-Pin SPDIP 28-Pin SPDIP 28-Pin SOIC 28-Pin SOIC DEVICE DIFFERENCES PIC18F4458 PIC18F4553 24576 32768 12288 16384 20 20 Ports Ports Yes Yes 13 Input Channels 13 Input Channels 40-Pin PDIP 40-Pin PDIP 44-Pin TQFP 44-Pin TQFP 44-Pin QFN ...
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... HIGH-END TO ENHANCED DEVICES A detailed discussion of the migration pathway and differences between the high-end MCU devices (i.e., PIC17CXXX) and the enhanced PIC18FXXX) is provided in AN726, “PIC17CXXX to PIC18CXXX Migration”. This Application Note is available as Literature Number DS00726. © 2009 Microchip Technology Inc. devices (i.e., ...
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... Equations A/D Acquisition Time .................................................. 26 A/D Minimum Charging Time ..................................... 26 Errata ................................................................................... 6 I Internet Address ................................................................. 43 Interrupt Sources A/D Conversion Complete ......................................... 25 © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 M Microchip Internet Web Site ............................................... 43 Migration from High-End to Enhanced Devices ................. 40 Migration from Mid-Range to Enhanced Devices .............. 40 P Packaging Information ....................................................... 37 Pin Functions MCLR/V /RE3 ...
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... ADCON2 (A/D Control 2) ........................................... 23 DEVID1 (Device ID 1) ................................................ 32 DEVID2 (Device ID 2) ................................................ 32 Revision History ................................................................. 39 S Special Features of the CPU .............................................. 31 T Timing Diagrams A/D Conversion .......................................................... 36 Timing Diagrams and Specifications A/D Conversion Requirements .................................. 36 W WWW Address ................................................................... 43 WWW, On-Line Support ....................................................... 6 DS39887C-page 42 © 2009 Microchip Technology Inc. ...
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... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • ...
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... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS39887C-page 44 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS39887C © 2009 Microchip Technology Inc. ...
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... TQFP (Thin Quad Flatpack SOIC SP = Skinny PDIP P = PDIP ML = QFN Pattern QTP, SQTP, Code or Special Requirements (blank otherwise) © 2009 Microchip Technology Inc. PIC18F2458/2553/4458/4553 XXX Examples: Pattern a) PIC18LF4553-I/P 301 = Industrial temp., PDIP package, Extended V #301. b) PIC18LF2458-I/SO = Industrial temp., SOIC package, Extended V ( PIC18F4458-I/P = Industrial temp., PDIP (2) ...
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... Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2009 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...