PIC18F65K22-E/PT Microchip Technology, PIC18F65K22-E/PT Datasheet - Page 32
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PIC18F65K22-E/PT
Manufacturer Part Number
PIC18F65K22-E/PT
Description
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, GP 64 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F65K22-EMR.pdf
(550 pages)
Specifications of PIC18F65K22-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65K22-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F87K22 FAMILY
TABLE 1-4:
DS39960D-page 32
RF1/AN6/C2OUT/CTDIN
RF2/AN7/C1OUT
RF3/AN8/C2INB/CTMUI
RF4/AN9/C2INA
RF5/AN10/C1INB
RF6/AN11/C1INA
RF7/AN5/SS1
Legend: TTL = TTL compatible input
Note 1:
RF1
AN6
C2OUT
CTDIN
RF2
AN7
C1OUT
RF3
AN8
C2INB
CTMUI
RF4
AN9
C2INA
RF5
AN10
C1INB
RF6
AN11
C1INA
RF7
AN5
SS1
2:
3:
4:
5:
Pin Name
ST = Schmitt Trigger input with CMOS levels
I
P
I
Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
Not available on PIC18F65K22 and PIC18F85K22 devices.
PSP is available only in Microcontroller mode.
The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).
2
C = I
= Input
= Power
PIC18F8XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
2
C™/SMBus
Pin Number
TQFP
23
18
17
16
15
14
13
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Buffer
Type
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
PORTF is a bidirectional I/O port.
Digital I/O.
Analog Input 6.
Comparator 2 output.
CTMU pulse delay input.
Digital I/O.
Analog Input 7.
Comparator 1 output.
Digital I/O.
Analog Input 8.
Comparator 2 Input B.
CTMU pulse generator charger for the C2INB
comparator input.
Digital I/O.
Analog Input 9.
Comparator 2 Input A.
Digital I/O.
Analog Input 10.
Comparator 1 Input B.
Digital I/O.
Analog Input 11.
Comparator 1 Input A.
Digital I/O.
Analog Input 5.
SPI slave select input.
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
= Output
= Open-Drain (no P diode to V
Description
2009-2011 Microchip Technology Inc.
DD
)
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