PIC18F96J65T-I/PT Microchip Technology, PIC18F96J65T-I/PT Datasheet - Page 146

• Manufacturer Part Number: PIC18F96J65T-I/PT
• Description: 96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 12x12x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F96J65T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 96KB (48K x 16)
• Program Memory Type: FLASH
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100AC164323 - MODULE SKT FOR 100TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F97J60 FAMILY
TABLE 10-7:
DS39762E-page 146
RC0/T1OSO/
T13CKI
RC1/T1OSI/
ECCP2/P2A
RC2/ECCP1/
P1A
RC3/SCK1/
SCL1
RC4/SDI1/
SDA1
RC5/SDO1
RC6/TX1/CK1
RC7/RX1/DT1
Legend:
Note 1:
Pin Name
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Default assignment for ECCP2/P2A when CCP2MX Configuration bit is set.
Function
ECCP2
T1OSO
T13CKI
ECCP1
T1OSI
P2A
SDO1
SCK1
SCL1
SDA1
PORTC FUNCTIONS
SDI1
RC0
RC1
RC2
P1A
RC3
RC4
RC5
RC6
CK1
RC7
RX1
DT1
TX1
(1)
(1)
Setting
TRIS
0
1
x
1
0
1
x
0
1
0
0
1
0
1
0
0
1
0
1
0
1
0
1
1
1
1
0
1
0
0
1
1
1
1
0
1
1
1
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
LATC<0> data output.
PORTC<0> data input.
Timer1 oscillator output; enabled when Timer1 oscillator enabled. Disables
digital I/O.
Timer1/Timer3 counter input.
LATC<1> data output.
PORTC<1> data input.
Timer1 oscillator input; enabled when Timer1 oscillator enabled. Disables
digital I/O.
ECCP2 compare output and PWM output; takes priority over port data.
ECCP2 capture input.
ECCP2 Enhanced PWM output, channel A. May be configured for tri-state
during Enhanced PWM shutdown events. Takes priority over port data.
LATC<2> data output.
PORTC<2> data input.
ECCP1 compare output and PWM output; takes priority over port data.
ECCP1 capture input.
ECCP1 Enhanced PWM output, channel A. May be configured for tri-state
during Enhanced PWM shutdown events. Takes priority over port data.
LATC<3> data output.
PORTC<3> data input.
SPI clock output (MSSP1 module); takes priority over port data.
SPI clock input (MSSP1 module).
I
I
LATC<4> data output.
PORTC<4> data input.
SPI data input (MSSP1 module).
I
I
LATC<5> data output.
PORTC<5> data input.
SPI data output (MSSP1 module); takes priority over port data.
LATC<6> data output.
PORTC<6> data input.
Synchronous serial data output (EUSART1 module); takes priority over port data.
Synchronous serial data input (EUSART1 module). User must configure as
an input.
Synchronous serial clock input (EUSART1 module).
LATC<7> data output.
PORTC<7> data input.
Asynchronous serial receive data input (EUSART1 module).
Synchronous serial data output (EUSART1 module); takes priority over
port data.
Synchronous serial data input (EUSART1 module). User must configure as
an input.
2
2
2
2
C™ clock output (MSSP1 module); takes priority over port data.
C clock input (MSSP1 module); input type depends on module setting.
C data output (MSSP1 module); takes priority over port data.
C data input (MSSP1 module); input type depends on module setting.
Description
© 2009 Microchip Technology Inc.