PIC18LF13K22-E/P Microchip Technology, PIC18LF13K22-E/P Datasheet - Page 42

• Manufacturer Part Number: PIC18LF13K22-E/P
• Description: 8KB Flash, 256bytes RAM, 256bytes EEPROM, 16MIPS, NanoWatt XLP 20 PDIP .300in TU
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF13K22-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F1XK22/LF1XK22
3.3.5
The STATUS register, shown in Register 3-2, contains
the arithmetic status of the ALU. As with any other SFR,
it can be the operand for any instruction.
If the STATUS register is the destination for an instruc-
tion that affects the Z, DC, C, OV or N bits, the results
of the instruction are not written; instead, the STATUS
register is updated according to the instruction per-
formed. Therefore, the result of an instruction with the
STATUS register as its destination may be different
than intended. As an example, CLRF STATUS will set
the Z bit and leave the remaining Status bits
unchanged (‘000u u1uu’).
REGISTER 3-2:
DS41365D-page 42
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
—
For Borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the
second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high-order or low-order
bit of the source register.
STATUS REGISTER
Unimplemented: Read as ‘0’
N: Negative bit
This bit is used for signed arithmetic (two’s complement). It indicates whether the result was negative
(ALU MSB = 1).
1 = Result was negative
0 = Result was positive
OV: Overflow bit
This bit is used for signed arithmetic (two’s complement). It indicates an overflow of the 7-bit magni-
tude which causes the sign bit (bit 7 of the result) to change state.
1 = Overflow occurred for signed arithmetic (in this arithmetic operation)
0 = No overflow occurred
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit Carry/Borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)
1 = A carry-out from the 4th low-order bit of the result occurred
0 = No carry-out from the 4th low-order bit of the result
C: Carry/Borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions)
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
U-0
—
STATUS: STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
—
R/W-x
Preliminary
N
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x
It is recommended that only BCF, BSF, SWAPF, MOVFF
and MOVWF instructions are used to alter the STATUS
register, because these instructions do not affect the Z,
C, DC, OV or N bits in the STATUS register.
For other instructions that do not affect Status bits, see
the instruction set summaries in Table 23-2 and
Table 23-3.
OV
Note:
The C and DC bits operate as the borrow
and digit borrow bits, respectively, in
subtraction.
R/W-x
Z
(1)
 2010 Microchip Technology Inc.
(1)
x = Bit is unknown
R/W-x
DC
(1)
R/W-x
C
(1)
bit 0