PIC18LF13K50T-I/SS Microchip Technology, PIC18LF13K50T-I/SS Datasheet - Page 55

• Manufacturer Part Number: PIC18LF13K50T-I/SS
• Description: 8 KB Flash, 512 RAM, 15 I/O, 10-bit ADC, USB 2.0, NanoWatt XLP 20 SSOP .209in T/
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF13K50T-I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.3
The TBLRD instruction retrieves data from program
memory and places it into data RAM. Table reads from
program memory are performed one byte at a time.
TBLPTR points to a byte address in program space.
Executing TBLRD places the byte pointed to into
TABLAT. In addition, TBLPTR can be modified
automatically for the next table read operation.
FIGURE 4-4:
EXAMPLE 4-1:
 2010 Microchip Technology Inc.
READ_WORD
Reading the Flash Program
Memory
Instruction Register
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
TBLRD*+
MOVF
MOVWF
TBLRD*+
MOVFW
MOVF
(IR)
READS FROM FLASH PROGRAM MEMORY
READING A FLASH PROGRAM MEMORY WORD
CODE_ADDR_UPPER
TBLPTRU
CODE_ADDR_HIGH
TBLPTRH
CODE_ADDR_LOW
TBLPTRL
TABLAT, W
WORD_EVEN
TABLAT, W
WORD_ODD
(Even Byte Address)
FETCH
PIC18F1XK50/PIC18LF1XK50
Program Memory
Preliminary
; Load TBLPTR with the base
; address of the word
; read into TABLAT and increment
; get data
; read into TABLAT and increment
; get data
(Odd Byte Address)
The internal program memory is typically organized by
words. The Least Significant bit of the address selects
between the high and low bytes of the word.
shows the interface between the internal program
memory and the TABLAT.
TBLPTR = xxxxx1
TBLRD
Read Register
TABLAT
TBLPTR = xxxxx0
DS41350E-page 55
Figure 4-4