PIC18LF4458T-I/ML Microchip Technology, PIC18LF4458T-I/ML Datasheet - Page 26
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PIC18LF4458T-I/ML
Manufacturer Part Number
PIC18LF4458T-I/ML
Description
24KB Flash, 2KB RAM, 256 Bytes EEPROM, 35 I/O, USB, 12bit ADC 44 QFN 8x8x0.9mm T
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2458-ISO.pdf
(46 pages)
3.PIC18F2458-ISO.pdf
(6 pages)
4.PIC18F2458-ISO.pdf
(6 pages)
5.PIC18F2458-ISO.pdf
(6 pages)
Specifications of PIC18LF4458T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2458/2553/4458/4553
2.1
For the A/D Converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 2-3. The source
impedance (R
impedance directly affect the time required to charge
the capacitor C
impedance varies over the device voltage (V
source impedance affects the offset voltage at the ana-
log input (due to pin leakage current). The maximum
recommended impedance for analog sources is
2.5 kΩ. After the analog input channel is selected
(changed), the channel must be sampled for at least
the minimum acquisition time before starting a
conversion.
EQUATION 2-1:
EQUATION 2-2:
EQUATION 2-3:
DS39887C-page 26
T
V
or
T
T
T
T
Temperature coefficient is only required for temperatures > 25°C. Below 25°C, T
T
T
ACQ
Note:
C
ACQ
AMP
COFF
C
ACQ
HOLD
=
=
A/D Acquisition Requirements
=
=
=
=
=
=
=
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
T
S
AMP
) and the internal sampling switch (R
T
0.2 µs
(Temp – 25°C)(0.02 µs/°C)
(85°C – 25°C)(0.02 µs/°C)
1.2 µs
-(C
-(25 pF) (1 kΩ + 4 kΩ + 2.5 kΩ) ln(0.0002441) µs
1.56 µs
0.2 µs + 1.56 μs + 1.2 µs
2.96 µs
(V
-(C
AMP
HOLD
HOLD
+ T
REF
HOLD
+ T
C
. The sampling switch (R
– (V
ACQUISITION TIME
A/D MINIMUM CHARGING TIME
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
+ T
)(R
C
)(R
+ T
REF
COFF
IC
IC
+ R
COFF
/4096)) • (1 – e
+ R
HOLD
SS
SS
+ R
+ R
) must be allowed
S
S
) ln(1/4096) µs
) ln(1/4096)
(-T
C
DD
/C
). The
HOLD
SS
SS
(R
)
)
IC
+ R
SS
+ R
S
To calculate the minimum acquisition time, Equation 2-1
may be used. This equation assumes that 1/2 LSb error
is used (4096 steps for the 12-bit A/D). The 1/2 LSb error
is the maximum error allowed for the A/D to meet its
specified resolution.
Example 2-3 shows the calculation of the minimum
required acquisition time, T
based
assumptions:
C
Rs
Conversion Error
V
Temperature
))
HOLD
DD
)
on
COFF
the
= 0 µs.
=
=
≤
=
=
following
© 2009 Microchip Technology Inc.
25 pF
2.5 kΩ
1/2 LSb
3V → Rss = 4 kΩ
85°C (system max.)
ACQ
. This calculation is
application
system