PIC18LF46K80T-I/ML Microchip Technology, PIC18LF46K80T-I/ML Datasheet - Page 277
![ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU, NanoWatt XLP 44 QFN 8x8x0.](/photos/39/70/397090/qfn-44_sml.jpg)
PIC18LF46K80T-I/ML
Manufacturer Part Number
PIC18LF46K80T-I/ML
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU, NanoWatt XLP 44 QFN 8x8x0.
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18LF46K80T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18LF46K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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20.4
The Enhanced PWM mode can generate a PWM signal
on up to four different output pins with up to 10 bits of
resolution. It can do this through four different PWM
Output modes:
• Single PWM
• Half-Bridge PWM
• Full-Bridge PWM, Forward mode
• Full-Bridge PWM, Reverse mode
To select an Enhanced PWM mode, the P1M bits of the
CCP1CON register must be set appropriately.
FIGURE 20-3:
2011 Microchip Technology Inc.
Note 1: The TRIS register value for each PWM output must be configured appropriately.
Note 1: The 8-bit TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler, to create
CCPR1H (Slave)
2: Any pin not used by an Enhanced PWM mode is available for alternate pin functions.
PWM (Enhanced Mode)
Duty Cycle Registers
Comparator
CCPR1L
PR2
TMR2
Comparator
the 10-bit time base.
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
(1)
Clear Timer2,
Toggle PWM Pin and
Latch Duty Cycle
DC1B<1:0>
R
S
P1M<1:0>
Q
Preliminary
ECCP1DEL
Controller
PIC18F66K80 FAMILY
ECCP1/P1A
Output
2
The PWM outputs are multiplexed with I/O pins and are
designated: P1A, P1B, P1C and P1D. The polarity of the
PWM pins is configurable and is selected by setting the
CCP1M bits in the CCP1CON register appropriately.
Table 20-1
Enhanced PWM mode.
Figure 20-3
diagram of the Enhanced PWM module.
Note:
P1C
P1B
P1D
4
CCP1M<3:0>
To
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
provides the pin assignments for each
provides an example of a simplified block
TRIS
TRIS
TRIS
TRIS
prevent
the
generation
ECCP1/Output Pi
Output Pi
Output Pi
Output Pi
DS39977C-page 277
n
n
n
of
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