PIC18LF46K80T-I/ML Microchip Technology, PIC18LF46K80T-I/ML Datasheet - Page 403
![ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU, NanoWatt XLP 44 QFN 8x8x0.](/photos/39/70/397090/qfn-44_sml.jpg)
PIC18LF46K80T-I/ML
Manufacturer Part Number
PIC18LF46K80T-I/ML
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU, NanoWatt XLP 44 QFN 8x8x0.
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18LF46K80T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18LF46K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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REGISTER 27-4:
2011 Microchip Technology Inc.
Mode 0
Mode 1
Mode 2
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 7
Mode 0:
RXB0OVFL: Receive Buffer 0 Overflow bit
1 = Receive Buffer 0 has overflowed
0 = Receive Buffer 0 has not overflowed
Mode 1:
Unimplemented: Read as ‘ 0 ’
Mode 2:
FIFOEMPTY: FIFO Not Empty bit
1 = Receive FIFO is not empty
0 = Receive FIFO is empty
Mode 0:
RXB1OVFL: Receive Buffer 1 Overflow bit
1 = Receive Buffer 1 has overflowed
0 = Receive Buffer 1 has not overflowed
Mode 1, 2:
RXBnOVFL: Receive Buffer n Overflow bit
1 = Receive Buffer n has overflowed
0 = Receive Buffer n has not overflowed
TXBO: Transmitter Bus-Off bit
1 = Transmit error counter > 255
0 = Transmit error counter 255
TXBP: Transmitter Bus Passive bit
1 = Transmit error counter > 127
0 = Transmit error counter 127
RXBP: Receiver Bus Passive bit
1 = Receive error counter > 127
0 = Receive error counter 127
TXWARN: Transmitter Warning bit
1 = Transmit error counter > 95
0 = Transmit error counter 95
RXWARN: Receiver Warning bit
1 = 127 Receive error counter > 95
0 = Receive error counter 95
EWARN: Error Warning bit
This bit is a flag of the RXWARN and TXWARN bits.
1 = The RXWARN or the TXWARN bits are set
0 = Neither the RXWARN or the TXWARN bits are set
FIFOEMPTY RXBnOVFL
RXB0OVFL RXB1OVFL
R/C-0
R/C-0
R/C-0
—
COMSTAT: COMMUNICATION STATUS REGISTER
RXBnOVFL
R/C-0
R/C-0
R/C-0
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
TXBO
TXBO
TXB0
R-0
R-0
R-0
Preliminary
TXBP
TXBP
TXBP
R-0
R-0
R-0
PIC18F66K80 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RXBP
RXBP
RXBP
R-0
R-0
R-0
TXWARN
TXWARN
TXWARN
R-0
R-0
R-0
x = Bit is unknown
RXWARN
RXWARN
RXWARN
R-0
R-0
R-0
DS39977C-page 403
EWARN
EWARN
EWARN
R-0
R-0
R-0
bit 0
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