PIC24F04KA200T-I/ST Microchip Technology, PIC24F04KA200T-I/ST Datasheet - Page 138

• Manufacturer Part Number: PIC24F04KA200T-I/ST
• Description: PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F04KA200T-I/ST

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 4KB (1.375K x 24)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC24F04KA201 FAMILY
REGISTER 17-1:
DS39937B-page 136
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5
bit 4
Note 1:
R/C-0, HC
UARTEN
WAKE
R/W-0
2:
This feature is only available for the 16x BRG mode (BRGH = 0).
Bit availability depends on pin availability.
UARTEN: UART1 Enable bit
1 = UART1 is enabled; all UART1 pins are controlled by UART1 as defined by UEN<1:0>
0 = UART1 is disabled; all UART1 pins are controlled by port latches; UART1 power consumption is
Unimplemented: Read as ‘0’
USIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
IREN: IrDA
1 = IrDA encoder and decoder enabled
0 = IrDA encoder and decoder disabled
RTSMD: Mode Selection for U1RTS Pin bit
1 = U1RTS pin in Simplex mode
0 = U1RTS pin in Flow Control mode
Unimplemented: Read as ‘0’
UEN<1:0>: UART1 Enable bits
11 = U1TX, U1RX and U1BCLK pins are enabled and used; U1CTS pin controlled by port latches
10 = U1TX, U1RX, U1CTS and U1RTS pins are enabled and used
01 = U1TX, U1RX and U1RTS pins are enabled and used; U1CTS pin controlled by port latches
00 = U1TX and UxRX pins are enabled and used; U1CTS and U1RTS/U1BCLK pins controlled by port
WAKE: Wake-up on Start Bit Detect During Sleep Mode Enable bit
1 = UART1 will continue to sample the U1RX pin; interrupt generated on falling edge, bit cleared in
0 = No wake-up enabled
LPBACK: UART1 Loopback Mode Select bit
1 = Enable Loopback mode
0 = Loopback mode is disabled
ABAUD: Auto-Baud Enable bit
1 = Enable baud rate measurement on the next character – requires reception of a Sync field (55h);
0 = Baud rate measurement disabled or completed
RXINV: Receive Polarity Inversion bit
1 = U1RX Idle state is ‘0’
0 = U1RX Idle state is ‘1’
LPBACK
R/W-0
minimal
hardware on following rising edge
cleared in hardware upon completion
U-0
—
latches
U1MODE: UART1 MODE REGISTER
®
Encoder and Decoder Enable bit
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
R/W-0, HC
ABAUD
USIDL
R/W-0
(2)
IREN
RXINV
R/W-0
R/W-0
Preliminary
(1)
HC = Hardware Clearable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
RTSMD
BRGH
R/W-0
R/W-0
PDSEL1
R/W-0
U-0
—
© 2009 Microchip Technology Inc.
x = Bit is unknown
PDSEL0
R/W-0
R/W-0
UEN1
(2)
R/W-0
STSEL
R/W-0
UEN0
(2)
bit 8
bit 0