PIC24F04KA201T-I/SO Microchip Technology, PIC24F04KA201T-I/SO Datasheet - Page 151
PIC24F04KA201T-I/SO
Manufacturer Part Number
PIC24F04KA201T-I/SO
Description
PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24F04KA201-ISS.pdf
(8 pages)
2.PIC24F04KA201-ISS.pdf
(48 pages)
3.PIC24F04KA201-ISS.pdf
(224 pages)
4.PIC24F04KA201-ISS.pdf
(26 pages)
Specifications of PIC24F04KA201T-I/SO
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (1.375K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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REGISTER 19-5:
REGISTER 19-6:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-10
bit 9-6
bit 5-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-10
bit 9-6
bit 5-0
U-0
U-0
U-0
U-0
—
—
—
—
Unimplemented: Read as ‘0’
PCFG<12:10>: Analog Input Pin Configuration Control bits
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read enabled
0 = Pin configured in Analog mode; I/O port read disabled; A/D samples pin voltage
Unimplemented: Read as ‘0’
PCFG<5:0>: Analog Input Pin Configuration Control bits
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read enabled
0 = Pin configured in Analog mode; I/O port read disabled; A/D samples pin voltage
Unimplemented: Read as ‘0’
CSSL<12:10>: A/D Input Pin Scan Selection bits
1 = Corresponding analog channel selected for input scan
0 = Analog channel omitted from input scan
Unimplemented: Read as ‘0’
CSSL<5:0>: A/D Input Pin Scan Selection bits
1 = Corresponding analog channel selected for input scan
0 = Analog channel omitted from input scan
U-0
U-0
U-0
U-0
—
—
—
—
AD1PCFG: A/D PORT CONFIGURATION REGISTER
AD1CSSL: A/D INPUT SCAN SELECT REGISTER (LOW)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PCFG5
CSSL5
R/W-0
R/W-0
U-0
U-0
—
—
CSSL12
PCFG12
CSSL4
R/W-0
R/W-0
PCFG4
R/W-0
R/W-0
Preliminary
PIC24F04KA201 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CSSL11
CSSL3
R/W-0
R/W-0
PCFG11
PCFG3
R/W-0
R/W-0
CSSL10
CSSL2
R/W-0
R/W-0
PCFG10
PCFG2
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
CSSL1
R/W-0
R/W-0
PCFG1
R/W-0
—
U-0
—
DS39937B-page 149
CSSL0
R/W-0
R/W-0
PCFG0
R/W-0
—
U-0
—
bit 8
bit 0
bit 8
bit 0
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