PIC24F04KA201T-I/SS Microchip Technology, PIC24F04KA201T-I/SS Datasheet - Page 3
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PIC24F04KA201T-I/SS
Manufacturer Part Number
PIC24F04KA201T-I/SS
Description
PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24F04KA201-ISS.pdf
(8 pages)
2.PIC24F04KA201-ISS.pdf
(48 pages)
3.PIC24F04KA201-ISS.pdf
(224 pages)
4.PIC24F04KA201-ISS.pdf
(26 pages)
Specifications of PIC24F04KA201T-I/SS
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (1.375K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Silicon Errata Issues
1. Module: Resets (BOR)
TABLE 3:
2011 Microchip Technology Inc.
Param
Note:
No.
A device Reset may occur if the BOR is disabled
and
(RCON<14> is cleared, and then immediately
set).
Work around
It is recommended that several NOP instructions
be added to a BOR disable/enable sequence.
Alternatively, place several instructions or a
short routine between the instructions to disable
and enable the BOR.
Affected Silicon Revisions
A1
X
V
Symbol
immediately
IOFF
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A1).
COMPARATOR DC SPECIFICATIONS (PARTIAL)
Input Offset Voltage
re-enabled
Characteristics
in
software
PIC24F04KA201 FAMILY
Min
—
Typ
20
2. Module: Core (Deep Sleep)
3. Module: Comparator
Deep Sleep wake-up sources may be ignored if
they occur just prior to entry into Deep Sleep
mode. As a result, the device may enter Deep
Sleep mode when it should not.
Work around
If possible, configure external Deep Sleep
wake-up sources to repeat themselves once. If
the device does enter Deep Sleep, the second
occurrence of the wake-up source will wake the
device.
Alternatively, synchronize the entry into Deep
Sleep with external wake-up sources, where
possible.
Affected Silicon Revisions
The maximum value for the input offset voltage
(specification
Table 26-12 of the Device Data Sheet, has
changed for this silicon revision. The new value
is shown in
Work around
None.
Affected Silicon Revisions
Max
60
A1
A1
X
X
Units
mV
Table 3
D300,
(changes in bold).
V
IOFF
Comments
),
DS80474B-page 3
shown
in