PIC24F16KA101T-I/SS Microchip Technology, PIC24F16KA101T-I/SS Datasheet - Page 174
![16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 16 I/O,16-bit PIC24F Family, NanoWatt](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC24F16KA101T-I/SS
Manufacturer Part Number
PIC24F16KA101T-I/SS
Description
16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 16 I/O,16-bit PIC24F Family, NanoWatt
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.MA240017.pdf
(254 pages)
2.PIC24F04KA201-ISS.pdf
(48 pages)
3.PIC24F16KA101-ISS.pdf
(18 pages)
Specifications of PIC24F16KA101T-I/SS
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24F16KA101T-I/SS
Manufacturer:
MICROCHIR
Quantity:
20 000
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PIC24F16KA102 FAMILY
REGISTER 22-2:
DS39927B-page 172
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5-2
bit 1
bit 0
Note 1:
R-0, HSC
VCFG2
R/W-0
BUFS
When the OFFCAL bit is set, inputs are disconnected and tied to AV
zero. Then, the user can perform a conversion. Use of the Calibration mode is not affected by AD1PCFG
contents nor channel input selection. Any analog input switches are disconnected from the A/D converter
in this mode. The conversion result is stored by the user software and used to compensate subsequent
conversions. This can be done by adding the two’s complement of the result obtained with the OFFCAL bit
set to all normal A/D conversions.
VCFG<2:0>: Voltage Reference Configuration bits
OFFCAL: Offset Calibration bit
1 = Converts to get the offset calibration value
0 = Converts to get the actual input value
Unimplemented: Read as ‘0’
CSCNA: Scan Input Selections for CH0+ S/H Input for MUX A Input Multiplexer Setting bit
1 = Scan inputs
0 = Do not scan inputs
Unimplemented: Read as ‘0’
BUFS: Buffer Fill Status bit (valid only when BUFM = 1)
1 = A/D is currently filling buffer, 08-0F, user should access data in 00-07
0 = A/D is currently filling buffer, 00-07, user should access data in 08-0F
Unimplemented: Read as ‘0’
SMPI<3:0>: Sample/Convert Sequences Per Interrupt Selection bits
1111 = Interrupts at the completion of conversion for each 16
1110 = Interrupts at the completion of conversion for each 15
.
.
.
0001 = Interrupts at the completion of conversion for each 2
0000 = Interrupts at the completion of conversion for each sample/convert sequence
BUFM: Buffer Mode Select bit
1 = Buffer configured as two 8-word buffers (ADC1BUFn<15:8> and ADC1BUFn<7:0>)
0 = Buffer configured as one 16-word buffer (ADC1BUFn<15:0>)
ALTS: Alternate Input Sample Mode Select bit
1 = Uses MUX A input multiplexer settings for first sample, then alternates between MUX B and
0 = Always uses MUX A input multiplexer settings
VCFG1
R/W-0
MUX A input multiplexer settings for all subsequent samples
U-0
—
VCFG<2:0>
AD1CON2: A/D CONTROL REGISTER 2
000
001
010
011
1xx
HSC = Hardware Settable/Clearable bit
W = Writable bit
‘1’ = Bit is set
VCFG0
SMPI3
R/W-0
R/W-0
External V
External V
OFFCAL
(1)
SMPI2
R/W-0
R/W-0
Preliminary
AV
AV
AV
V
R
DD
DD
DD
+
(1)
REF
REF
+ pin
+ pin
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SMPI1
R/W-0
U-0
—
External V
External V
nd
th
th
CSCNA
SMPI0
R/W-0
R/W-0
sample/convert sequence
sample/convert sequence
sample/convert sequence
SS
AV
AV
AV
V
. This sets the inputs of the A/D to
R
SS
SS
SS
-
REF
REF
© 2009 Microchip Technology Inc.
- pin
- pin
x = Bit is unknown
R/W-0
BUFM
U-0
—
R/W-0
ALTS
U-0
—
bit 8
bit 0
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