PIC24FJ32GA102-E/SS Microchip Technology, PIC24FJ32GA102-E/SS Datasheet - Page 224

16-bit, 16 MIPS, 32KB Flash, 8KB RAM, Nanowatt XLP 28 SSOP .209in TUBE

PIC24FJ32GA102-E/SS

Manufacturer Part Number
PIC24FJ32GA102-E/SS
Description
16-bit, 16 MIPS, 32KB Flash, 8KB RAM, Nanowatt XLP 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet

Specifications of PIC24FJ32GA102-E/SS

Processor Series
PIC24
Core
PIC24F
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
8192 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
300 mA
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Eeprom Size
-
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
PIC24FJ64GA104 FAMILY
REGISTER 21-4:
DS39951C-page 224
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-13
bit 12-8
bit 7
bit 6-5
bit 4-0
Note 1:
CH0NB
CH0NA
R/W-0
R/W-0
2:
3:
Combinations not shown here are unimplemented; do not use.
Analog channels, AN6, AN7, AN8 and AN12, are unavailable on 28-pin devices; do not use.
Selecting this internal channel allows the CTMU module to utilize the A/D Converter sample and hold
capacitor (C
CH0NB: Channel 0 Negative Input Select for MUX B Multiplexer Setting bit
1 = Channel 0 negative input is AN1
0 = Channel 0 negative input is V
Unimplemented: Read as ‘0’
CH0SB<4:0>: Channel 0 Positive Input Select for MUX B Multiplexer Setting bits
11111 = Channel 0 positive input is reserved for CTMU use only
1xxxx = Unimplemented; do not use.
01111 = Channel 0 positive input is internal band gap reference (V
01110 = Channel 0 positive input is V
01101 = Channel 0 positive input is voltage regulator output (V
01100 = Channel 0 positive input is AN12
01011 = Channel 0 positive input is AN11
01010 = Channel 0 positive input is AN10
01001 = Channel 0 positive input is AN9
01000 = Channel 0 positive input is AN8
00111 = Channel 0 positive input is AN7
00110 = Channel 0 positive input is AN6
00101 = Channel 0 positive input is AN5
00100 = Channel 0 positive input is AN4
00011 = Channel 0 positive input is AN3
00010 = Channel 0 positive input is AN2
00001 = Channel 0 positive input is AN1
00000 = Channel 0 positive input is AN0
CH0NA: Channel 0 Negative Input Select for MUX A Multiplexer Setting bit
1 = Channel 0 negative input is AN1
0 = Channel 0 negative input is V
Unimplemented: Read as ‘0’
CH0SA<4:0>: Channel 0 Positive Input Select for MUX A Multiplexer Setting bits
Implemented combinations are identical to those for CH0SB<4:0> (above).
U-0
U-0
AD1CHS: A/D INPUT SELECT REGISTER
AD
) for the smallest time measurements.
W = Writable bit
‘1’ = Bit is set
U-0
U-0
CH0SB4
CH0SA4
R/W-0
R/W-0
R
R
-
-
BG
(1,2)
/2
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CH0SB3
CH0SA3
R/W-0
R/W-0
(1,2)
CH0SB2
CH0SA2
R/W-0
R/W-0
DDCORE
(3)
BG
(1,2)
)
)
 2010 Microchip Technology Inc.
x = Bit is unknown
CH0SB1
CH0SA1
R/W-0
R/W-0
(1,2)
(1,2)
CH0SB0
CH0SA0
R/W-0
R/W-0
bit 8
bit 0
(1,2)

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