PIC24HJ12GP202-E/SO Microchip Technology, PIC24HJ12GP202-E/SO Datasheet - Page 119

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PIC24HJ12GP202-E/SO

Manufacturer Part Number
PIC24HJ12GP202-E/SO
Description
12KB, Flash, 1024bytes-RAM, 40MIPS, 21I/O, 16-bit Family,nanoWatt 28 SOIC .300in
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ12GP202-E/SO

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164339 - MODULE SKT FOR PM3 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24HJ12GP202-E/SO
Manufacturer:
MICROCHIP
Quantity:
12 000
12.0
The Timer2/3 feature has 32-bit timers that can also be
configured as two independent 16-bit timers with
selectable operating modes.
As a 32-bit timer, the Timer2/3 feature permits
operation in three modes:
• Two Independent 16-bit timers (Timer2 and
• Single 32-bit timer (Timer2/3)
• Single 32-bit synchronous counter (Timer2/3)
The Timer2/3 feature also supports:
• Timer gate operation
• Selectable Prescaler Settings
• Timer operation during Idle and Sleep modes
• Interrupt on a 32-bit Period Register Match
• Time Base for Input Capture and Output Compare
• ADC1 Event Trigger (Timer2/3 only)
Individually, all eight of the 16-bit timers can function as
synchronous timers or counters. They also offer the
features listed above, except for the event trigger. The
operating modes and enabled features are determined
by setting the appropriate bit(s) in the T2CON and
T3CON registers. T2CON registers are shown in
generic form in Register 12-1. T3CON registers are
shown in Register 12-2.
For 32-bit timer/counter operation, Timer2 is the lsw,
and Timer3 is the msw of the 32-bit timers.
© 2009 Microchip Technology Inc.
Note:
Timer3) with all 16-bit operating modes (except
Asynchronous Counter mode)
Modules (Timer2 and Timer3 only)
Note:
TIMER2/3 FEATURE
This data sheet summarizes the features
of the PIC24HJ12GP201/202 family of
devices. It is not intended to be a
comprehensive
complement the information in this data
sheet, refer to the PIC24H Family
Reference Manual, “Section 11. Timers”
(DS70244), which is available from the
Microchip web site (www.microchip.com).
For 32-bit operation, T3CON control bits
are ignored. Only T2CON control bit is
used for setup and control. Timer2 clock
and gate inputs are used for the 32-bit
timer
generated with the Timer3 interrupt flags.
modules,
reference
but
an
interrupt
source.
Preliminary
To
is
PIC24HJ12GP201/202
12.1
To configure the Timer2/3 feature for 32-bit operation:
1.
2.
3.
4.
5.
6.
The timer value at any point is stored in the register
pair TMR3:TMR2. TMR3 always contains the msw of
the count, while TMR2 contains the lsw.
To configure any of the timers for individual 16-bit
operation:
1.
2.
3.
4.
5.
6.
Set the corresponding T32 control bit.
Select the prescaler ratio for Timer2 using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the
corresponding TCS and TGATE bits.
Load the timer period value. PR3 contains the
msw of the value, while PR2 contains the lsw.
If interrupts are required, set the interrupt enable
bit, T3IE. Use the priority bits T3IP<2:0> to set
the interrupt priority. While Timer2 controls the
timer, the interrupt appears as a Timer3
interrupt.
Set the corresponding TON bit.
Clear the T32 bit corresponding to that timer.
Select the timer prescaler ratio using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the TCS
and TGATE bits.
Load the timer period value into the PRx
register.
If interrupts are required, set the interrupt enable
bit, TxIE. Use the priority bits, TxIP<2:0>, to set
the interrupt priority.
Set the TON bit.
32-bit Operation
DS70282D-page 117

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