PIC24HJ32GP202-E/SO Microchip Technology, PIC24HJ32GP202-E/SO Datasheet - Page 7
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PIC24HJ32GP202-E/SO
Manufacturer Part Number
PIC24HJ32GP202-E/SO
Description
16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP202-ISO.pdf
(272 pages)
3.PIC24HJ32GP202-ISO.pdf
(8 pages)
4.PIC24HJ32GP202-ISO.pdf
(12 pages)
Specifications of PIC24HJ32GP202-E/SO
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164339 - MODULE SKT FOR PM3 28SOIC
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
19. Module: I
20. Module: CPU
© 2010 Microchip Technology Inc.
When the I
or Slave mode, after the ACKSTAT bit is set when
receiving a NACK, it may be cleared by the
reception of a Start or Stop bit.
Work around
Store the value of the ACKSTAT bit immediately
after receiving a NACK.
Affected Silicon Revisions
The EXCH instruction does not execute correctly.
Work around
If
recommended work around is to replace:
EXCH Wsource, Wdestination
with:
PUSH Wdestination
MOV Wsource, Wdestination
POP Wsource
If using the MPLAB C30 C compiler, specify the
compiler option: -merrata=exch (Project > Build
Options > Projects > MPLAB C30 > Use Alternate
Settings).
Affected Silicon Revisions
A2
A2
X
X
writing
A3
A3
X
X
2
2
C module is operating in either Master
C
source
A4
A4
X
X
PIC24HJ32GP202/204 and PIC24HJ16GP304
A5
A5
X
X
code
A6
A6
X
X
in
assembly,
the
21. Module: PGEC3/PGED3 Programming
22. Module: UART
When using the PGEC3/PGED3 pins for device
programming, the programming time may be
slower as compared to other available PGECx/
PGEDx pin pairs, because the Enhanced ICSP
programming algorithm cannot be executed on
this pin pair.
Refer
Programming
additional information on this limitation.
Work around
Use alternate PGECx/PGEDx programming pin
pairs.
Affected Silicon Revisions
The UART module will not generate consecutive
break characters. Trying to perform a back-to-back
Break character transmission will cause the UART
module to transmit the dummy character used to
generate the first Break character instead of
transmitting the second Break character. Break
characters are generated correctly if they are
followed by non-Break character transmission.
Work around
None.
Affected Silicon Revisions
A2
A2
X
X
A3
A3
X
X
to
Pins
A4
A4
the
X
X
Specification”
A5
A5
X
X
“dsPIC33F/PIC24H
A6
A6
X
X
(DS70152)
DS80467E-page 7
Flash
for