PIC24HJ32GP202-H/MM Microchip Technology, PIC24HJ32GP202-H/MM Datasheet - Page 3

• Manufacturer Part Number: PIC24HJ32GP202-H/MM
• Description: 16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ32GP202-H/MM

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (11K x 24)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 140°C
• Package / Case: 28-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6. Module: UART
7. Module: UART
8. Module: SPI
9. Module: I
10. Module: I
© 2008 Microchip Technology Inc.
When the UART is configured for IR interface
operations (UxMODE<9:8> = 11), the 16x baud
clock signal on the BCLK pin is present only when
the module is transmitting. The pin is idle at all
other times.
Work around
Configure one of the output compare modules to
generate the required baud clock signal when the
UART is receiving data or in an Idle state.
When the UART is in 4x mode (BRGH = 1) and
using two Stop bits (STSEL = 1), it may sample the
first Stop bit instead of the second one.
This issue does not affect the other UART
configurations.
Work around
Use the 16x baud rate option (BRGH = 0) and
adjust the baud rate accordingly.
When the SPI module is enabled, setting the
DISSCK bit in the SPIxCON1 register does not
allow the user application to use the SCK pin as a
General Purpose I/O pins.
Work around
None.
The BCL bit in I2CSTAT can be cleared only with
16-bit operation and can be corrupted with 1-bit or
8-bit operations on I2CSTAT.
Work around
Use 16-bit operations to clear BCL.
During I
operating in Slave mode transmits data to the
master, the ACKSTAT bit in the I2CxSTAT register
is set or cleared depending on whether the master
sent an ACK or NACK after the byte of data. If the
ACKSTAT bit is set it will be cleared again after
some delay.
Work around
Store the value of the ACKSTAT bit immediately
after an I
2
2
C interrupt occurs.
C communication, after a device
2
2
C
C
11. Module: I
12. Module: Product Identification
13. Module: UART (UxE Interrupt)
14. Module: UART (IrDA)
15. Module: Internal Voltage Regulator
If there are two I
them is acting as the Master receiver and the other
as the Slave transmitter. Suppose that both
devices are configured for 10-bit addressing
mode, and have the same value in the A10 and A9
bits of their addresses. When the Slave select
address is sent from the Master, both the Master
and Slave acknowledges it. When the Master
sends out the read operation, both the Master and
the Slave enter into Read mode and both of them
transmit the data. The resultant data will be the
ANDing of the two transmissions.
Work around
Use different addresses including the higher two
bits (A10 and A9) for different modules.
Revision A2 devices marked as extended
temperature range (E) devices, support only
industrial temperature range (I).
Work around
Use Revision A3 or newer devices marked as
extended temperature range (E) devices.
The UART error interrupt may not occur, or may
occur at an incorrect time, if multiple errors occur
during a short period of time.
Work around
Read the error flags in the UxSTA register when-
ever a byte is received to verify the error status. In
most cases, these bits will be correct, even if the
UART error interrupt fails to occur.
When the UART is operating in 8-bit mode
(PDSEL = 0x) and using the IrDA encoder/decoder
(IREN = 1), the module incorrectly transmits a data
payload of 80h as 00h.
Work around
None.
When the VREGS (RCON<8>) bit is set to a logic
‘0’, higher sleep current may be observed.
Work around
Ensure VREGS (RCON<8>) bit is set to a logic ‘1’
for device Sleep mode operation.
2
C
2
C devices on the bus, one of
DS80339D-page 3