PIC32MX320F064HT-40I/MR Microchip Technology, PIC32MX320F064HT-40I/MR Datasheet - Page 26

• Manufacturer Part Number: PIC32MX320F064HT-40I/MR
• Description: 64 KB Flash, 16 KB RAM, 40 MHz, 10-Bit ADC 64 QFN 9x9x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX320F064HT-40I/MR

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: EUART, I2C, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC32MX
15.0
Once a device has been properly programmed, the
device must be taken out of Programming mode to start
proper execution of its new program memory contents.
15.1
Exiting Test mode is done by removing V
as illustrated in Figure 15-1. The only requirement for
exit is that an interval, P9B, should elapse between the
last clock and program signals before removing V
FIGURE 15-1:
The following steps are required to exit Test mode:
1.
2.
3.
DS61145G-page 26
SetMode (5’b11111).
Assert MCLR.
Remove power (if the device is powered).
MCLR
EXITING PROGRAMMING
MODE
4-Wire Interface
TCK
TMS
TDO
V
TDI
DD
‘1’
‘1’
4-WIRE EXIT TEST MODE
‘0’
P9B
IH
from MCLR,
IH
.
15.2
Exiting Test mode is done by removing V
as illustrated in Figure 15-2. The only requirement for
exit is that an interval, P9B, should elapse between the
last clock and program signals on PGCx and PGDx
before removing V
FIGURE 15-2:
The following list provides the actual steps required to
exit test mode:
1.
2.
3.
4.
SetMode (5’b11111).
Assert MCLR.
Issue a clock pulse on PGCx.
Remove power (if the device is powered).
MCLR
PGDx
PGCx
V
DD
2-Wire Interface
IH
.
2-WIRE EXIT TEST MODE
PGD = Input
© 2010 Microchip Technology Inc.
V
P9B P15
IH
V
IH
IH
from MCLR,