PIC32MX764F128L-I/BG Microchip Technology, PIC32MX764F128L-I/BG Datasheet - Page 135
![100 PINS, 128KB Flash, 32KB RAM, 80 MHz, USB, CAN, Ethernet, 4 DMA 121 XBGA 10x1](/photos/12/13/121347/121-xbga_sml.jpg)
PIC32MX764F128L-I/BG
Manufacturer Part Number
PIC32MX764F128L-I/BG
Description
100 PINS, 128KB Flash, 32KB RAM, 80 MHz, USB, CAN, Ethernet, 4 DMA 121 XBGA 10x1
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80IMR.pdf
(254 pages)
Specifications of PIC32MX764F128L-I/BG
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Processor Series
PIC32MX5x
Core
MIPS32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX764F128L-I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
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15.0
The Input Capture module is useful in applications
requiring frequency (period) and pulse measurement.
The Input Capture module captures the 16-bit or 32-bit
value of the selected Time Base registers when an
event occurs at the ICx pin. The following events cause
capture events:
FIGURE 15-1:
© 2010 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
INPUT CAPTURE
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 15. “Input
Capture” (DS61122) of the “PIC32
Family Reference Manual” , which is
available from the Microchip web site
(www.microchip.com/PIC32).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
ICM<2:0>
Prescaler
ICx Input
1, 4, 16
INPUT CAPTURE BLOCK DIAGRAM
ICM<2:0>
FEDGE
Edge Detect
ICxCON
FIFO Control
ICBNE
ICI<1:0>
in
ICOV
ICTMR
C32
Generation
1.
2.
3.
4.
Each input capture channel can select between one of
two 16-bit timers (Timer2 or Timer3) for the time base,
or two 16-bit timers (Timer2 and Timer3) together to
form a 32-bit timer. The selected timer can use either
an internal or external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
• Interrupt on input capture event
• 4-word FIFO buffer for capture values
• Input capture can also be used to provide
Interrupt
Interrupt
Event
PIC32MX5XX/6XX/7XX
Sleep and Idle modes
Interrupt optionally generated after 1, 2, 3 or 4
buffer locations are filled
additional sources of external interrupts
ICxBUF<31:16>
Simple capture event modes
- Capture timer value on every falling edge of
- Capture timer value on every rising edge of
Capture timer value on every edge (rising and
falling)
Capture timer value on every edge (rising and
falling), specified edge first.
Prescaler capture event modes
- Capture timer value on every 4th rising
- Capture timer value on every 16th rising
edge of input at ICx pin
edge of input at ICx pin
input at ICx pin
input at ICx pin
Data Space Interface
Peripheral Data Bus
ICxBUF<15:0>
Timer3 Timer2
0
1
DS61156F-page 135
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