PIC32MX764F128L-I/BG Microchip Technology, PIC32MX764F128L-I/BG Datasheet - Page 58
![100 PINS, 128KB Flash, 32KB RAM, 80 MHz, USB, CAN, Ethernet, 4 DMA 121 XBGA 10x1](/photos/12/13/121347/121-xbga_sml.jpg)
PIC32MX764F128L-I/BG
Manufacturer Part Number
PIC32MX764F128L-I/BG
Description
100 PINS, 128KB Flash, 32KB RAM, 80 MHz, USB, CAN, Ethernet, 4 DMA 121 XBGA 10x1
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80IMR.pdf
(254 pages)
Specifications of PIC32MX764F128L-I/BG
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Processor Series
PIC32MX5x
Core
MIPS32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX764F128L-I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
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TABLE 4-1:
Legend:
Note 1:
2000
2010 BMXDKPBA
2020 BMXDUDBA
2030 BMXDUPBA
2040 BMXDRMSZ
2050 BMXPUPBA
2060 BMXPFMSZ
2070 BMXBOOTSZ
BMXCON
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
This register has corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See
(1)
(1)
(1)
(1)
(1)
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
BUS MATRIX REGISTER MAP
31/15
—
—
—
—
—
—
30/14
—
—
—
—
—
—
29/13
—
—
—
—
—
—
28/12
—
—
—
—
—
—
27/11
—
—
—
—
—
—
BMXCHEDMA
26/10
—
—
—
—
—
25/9
—
—
—
—
—
—
24/8
—
—
—
—
—
—
BMXBOOTSZ<31:0>
BMXDRMSZ<31:0>
BMXDKPBA<15:0>
BMXDUDBA<15:0>
BMXDUPBA<15:0>
BMXPUPBA<15:0>
BMXPFMSZ<31:0>
23/7
—
—
—
—
—
—
Bits
BMXWSDRM
22/6
—
—
—
—
—
21/5
—
—
—
—
—
—
BMXERRIXI BMXERRICD BMXERRDMA BMXERRDS BMXERRIS 001F
20/4
—
—
—
—
—
Section 12.1.1 “CLR, SET and INV Registers”
19/3
—
—
—
—
BMXPUPBA<19:16>
18/2
—
—
—
BMXARB<2:0>
17/1
—
—
—
for more information.
16/0
—
—
—
0041
0000
0000
0000
0000
0000
0000
xxxx
xxxx
0000
0000
xxxx
xxxx
0000
3000
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