SSM2319CBZ-REEL Analog Devices Inc, SSM2319CBZ-REEL Datasheet - Page 16

3W Filterless ClassDMonoAudioAmp W/sync

SSM2319CBZ-REEL

Manufacturer Part Number
SSM2319CBZ-REEL
Description
3W Filterless ClassDMonoAudioAmp W/sync
Manufacturer
Analog Devices Inc
Type
Class Dr
Datasheet

Specifications of SSM2319CBZ-REEL

Output Type
1-Channel (Mono)
Max Output Power X Channels @ Load
3.7W x 1 @ 3 Ohm
Voltage - Supply
2.5 V ~ 5.5 V
Features
Depop, Differential Inputs, Short-Circuit and Thermal Protection, Shutdown
Mounting Type
Surface Mount
Package / Case
9-WLCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SSM2319
Operating Modes
The SYNC operating modes include the following:
INTERNAL
INTERNAL
Initial SYNC startup. An internal reference signal, REF, is
released after one complete internal clock cycle (MCLK).
After REF is released, another internal signal, MOD, waits
127 internal clock cycles. This operates as a training signal
to determine the SYNCI/SYNCO connection. During this
time, SYNCO is the internal clock signal.
SYNCI = GND or VDD. SYNCO stops generating pulses.
The modulator is controlled by an internal clock signal, as
shown in Figure 37.
SIGNAL
SYNCI = SYNCO. SYNCO is the delayed clock signal of
SYNCI, as shown in Figure 38.
SIGNAL
SYNCI = SYNCO
SYNCI = GND
SYNCO
SYNCO
SYNCI
SYNCI
MCLK
MCLK
MOD
MOD
REF
REF
SD
SD
Figure 37. SYNCI = GND or VDD
Figure 38. SYNCI = SYNCO
Rev. 0 | Page 16 of 20
INTERNAL
INTERNAL
INTERNAL
SIGNAL
SYNCI = external clock. SYNCO is a buffered clock output
sourced from an external clock signal. One clock cycle after
the internal modulator detect signal is released, an irregular
pulse appears on MCLK before the first buffered output signal
begins on SYNCO, as shown in Figure 39.
SYNCI = GND, transitions to clock. When the SYNCI pin is
connected to GND first but then transitions to a clock signal,
SYNCO generates several internal clock signals before finally
being synchronized to the external clock signal, as shown
in Figure 40.
SYNCI = CLK, transitions to GND. When SYNCI is
connected to a clock signal but then transitions to GND,
the SYNCO pin immediately stops generating a clock signal.
After a short clock loss detect time, the internal modulator
synchronizes to the internal clock signal, as shown
in Figure 41.
SIGNAL
SIGNAL
SYNCI = GND TO CLKIN
SYNCI = CLKIN TO GND
SYNCI = CLKIN
SYNCO
SYNCO
SYNCO
SYNCI
SYNCI
MCLK
SYNCI
MCLK
MCLK
MOD
MOD
MOD
REF
REF
REF
SD
SD
SD
Figure 40. SYNCI = GND to Clock Input
Figure 41. SYNCI = Clock Input to GND
Figure 39. SYNCI = External Clock
CLK LOSS
DETECT

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