STK12C68-5L35M Cypress Semiconductor Corp, STK12C68-5L35M Datasheet - Page 9
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STK12C68-5L35M
Manufacturer Part Number
STK12C68-5L35M
Description
STK12C68-5L35M
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.STK12C68-5C55M.pdf
(18 pages)
Specifications of STK12C68-5L35M
Format - Memory
RAM
Memory Type
NVSRAM (Non-Volatile SRAM)
Memory Size
64K (8K x 8)
Speed
35ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Package / Case
28-LCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
AC Switching Characteristics
SRAM Read Cycle
Switching Waveforms
Notes
Document Number: 001-51026 Rev. **
t
t
t
t
t
t
t
t
t
t
t
7. WE and HSB must be High during SRAM Read cycles.
8. Device is continuously selected with CE and OE both Low.
9. Measured ±200 mV from steady state output voltage.
ACE
RC
AA
DOE
OHA
LZCE
HZCE
LZOE
HZOE
PU
PD
Parameter
Cypress
[8]
[7]
[6]
[6]
[8]
[9]
[9]
[9]
[9]
Parameter
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t
t
t
t
t
t
t
t
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t
ELQV
AVAV,
AVQV
GLQV
AXQX
ELQX
EHQZ
GLQX
GHQZ
ELICCH
EHICCL
t
ELEH
Alt
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Output Hold After Address Change
Chip Enable to Output Active
Chip Disable to Output Inactive
Output Enable to Output Active
Output Disable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
Figure 9. SRAM Read Cycle 2: CE and OE Controlled
Figure 8. SRAM Read Cycle 1: Address Controlled
Description
Min
35
5
5
0
0
35 ns
STK12C68-5 (SMD5962-94599)
Max
35
35
15
10
10
35
[7, 8]
[7]
Min
55
5
5
0
0
55 ns
Max
55
55
35
12
12
55
Page 9 of 18
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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