STK12C68-5L55M Cypress Semiconductor Corp, STK12C68-5L55M Datasheet - Page 3
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STK12C68-5L55M
Manufacturer Part Number
STK12C68-5L55M
Description
STK12C68-5L55M
Manufacturer
Cypress Semiconductor Corp
Type
NVSRAMr
Specifications of STK12C68-5L55M
Format - Memory
RAM
Memory Type
NVSRAM (Non-Volatile SRAM)
Memory Size
64K (8K x 8)
Speed
35ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Package / Case
28-LCC
Word Size
8b
Organization
8Kx8
Density
64Kb
Interface Type
Parallel
Access Time (max)
55ns
Operating Supply Voltage (typ)
5V
Package Type
CLCC
Operating Temperature Classification
Military
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Operating Temp Range
-55C to 125C
Pin Count
28
Mounting
Surface Mount
Supply Current
75mA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Pin Configurations
Pin Definitions
Document Number: 001-51027 Rev. *A
Pin Name
DQ
A
V
HSB
0
V
V
WE
CE
OE
0
–A
CAP
SS
CC
-DQ
12
7
Alt
W
G
E
Input or Output Bidirectional Data I/O Lines. Used as input or output lines depending on operation.
Input or Output Hardware Store Busy (HSB). When LOW, this output indicates a Hardware Store is in progress.
Power Supply Power Supply Inputs to the Device.
Power Supply AutoStore Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM
I/O Type
Ground
Input
Input
Input
Input
Address Inputs. Used to select one of the 8,192 bytes of the nvSRAM.
Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the I/O
pins is written to the specific address location.
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
Output Enable, Active LOW. The active LOW OE input enables the data output buffers during
read cycles. Deasserting OE HIGH causes the I/O pins to tristate.
Ground for the Device. The device is connected to ground of the system.
When pulled low external to the chip, it initiates a nonvolatile STORE operation. A weak internal
pull up resistor keeps this pin high if not connected (connection optional).
to nonvolatile elements.
Figure 1. 28-Pin SOIC/DIP and LLC
Description
STK12C68
Page 3 of 21
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