SY89429VZH Micrel Inc, SY89429VZH Datasheet - Page 4

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SY89429VZH

Manufacturer Part Number
SY89429VZH
Description
5V/3.3V Programmable Frequency Synthesizer (25-400MHz) (Green)
Manufacturer
Micrel Inc
Series
Precision Edge®r
Type
Frequency Synthesizerr
Datasheet

Specifications of SY89429VZH

Pll
Yes
Input
Crystal
Output
PECL
Number Of Circuits
1
Ratio - Input:output
1:1
Differential - Input:output
No/Yes
Frequency - Max
800MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 5.25 V
Operating Temperature
0°C ~ 75°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Frequency-max
10.7GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-1422
SY89429VZHC
Micrel, Inc.
INPUTS
XTAL1, XTAL2
These pins form an oscillator when connected to an external
crystal. The crystal is series resonant. See “AN-07” for Crystal
Interface Guideline.
S
This TTL pin loads the configuration latches with the contents
of the shift registers. The latches will be transparent when this
signal is HIGH; thus, the register data must be stable on the
HIGH-to-LOW transition of S
S
This TTL pin is the input to the serial configuration shift
registers.
S
This TTL pin clocks the serial configuration shift registers. On
the rising edge of this signal, data from S
/P
This TTL pin loads the configuration latches with the contents
of the parallel inputs. The latches will be transparent when this
signal is LOW: Thus, the parallel data must be stable on the
LOW-to-HIGH transition of /P
During power up, hold /P
M[0] - M[8] until supplies have stabilized.
M[8:0]
These TTL pins are used to configure the PLL loop divider.
They are sampled on the LOW-to-HIGH transition of /P
M[8] is the MSB, M[0] is the LSB. The binary count on the M
pins equates to the divide-by value for the PLL.
N[1:0]
These TTL pins are used to configure the output divider
modulus. They are sampled on the LOW-to-HIGH transition
of /P
M9999-011106
hbwhelp@micrel.com or (408) 955-1690
_LOAD
_DATA
_CLOCK
_LOAD
PIN DESCRIPTIONS
_LOAD
N[1:0]
0 0
0 1
1 0
1 1
.
_LOAD
_LOAD
Output Division
_LOAD
low with a valid M count on
for proper operation.
16
2
4
8
for proper operation.
_DATA
is sampled.
_LOAD
.
4
OUTPUTS
FOUT, /FOUT
These differential positive-referenced ECL signals (PECL)
are the output of the synthesizer.
TEST
The function of this TTL output is determined by the serial
configuration bits T[2:0].
POWER
V
This is the positive supply for the chip and is normally
connected to +3.3V or +5.0V.
V
This is the positive reference for the PECL outputs, FOUT and
/FOUT. It is constrained to be less than or equal to V
V
This is the positive supply for the PLL and should be as noise-
free as possible for low-jitter operation.
GND
These pins are the negative supply for the chip and are
normally all connected to ground.
OTHER
LOOP_FILTER
This is an analog I/O pin that provides the loop filter for the
PLL.
LOOP_REF
This is an analog I/O pin that provides a reference voltage for
the PLL.
CC1
CC_OUT
CC_QUIET
Precision Edge
SY89429V
CC1
.
®

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