MC34912G5AC Freescale, MC34912G5AC Datasheet - Page 80
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MC34912G5AC
Manufacturer Part Number
MC34912G5AC
Description
Manufacturer
Freescale
Datasheet
1.MC34912G5AC.pdf
(94 pages)
Specifications of MC34912G5AC
Turn Off Delay Time
10us
Number Of Drivers
4
Operating Temperature (min)
-40C
Lead Free Status / RoHS Status
Compliant
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Current Limit (LIN Interrupt)
conditions. In case of an over-current condition (e.g. LIN bus
short to V
LINOC in the LIN Status Register (LINSR) is set.
an Interrupt IRQ will be generated.
Over-temperature Shutdown (LIN Interrupt)
temperature conditions. In case of an over-temperature
condition, the transmitter will be shut down and the LINOT bit
in the LIN Status Register (LINSR) is set.
an Interrupt IRQ will be generated.
condition is gone and TXD is high.
high, will re-enable the transmitter.
RXD Short-circuit Detection (LIN Interrupt)
RXD output pin. In case of an short-circuit condition, either 5V
or Ground, the RXSHORT bit in the LIN Status Register
(LINSR) is set and the transmitter is shut down.
an Interrupt IRQ will be generated.
condition is gone (transition on RXD) and TXD is high.
pin short-circuit condition will clear the bit RXSHORT.
TXD Dominant Detection (LIN Interrupt)
stuck in dominant (0V) condition. In case of a stuck condition
(TXD pin 0 V for more than 1 second (typ.)), the transmitter is
shut down and the TXDOM bit in the LIN Status Register
(LINSR) is set.
generated.
80
33912
FUNCTIONAL DEVICE OPERATIONS
OPERATIONAL MODES
The output low side FET is protected against over-current
If the LINM bit is set in the Interrupt Mask Register (IMR),
The output low side FET is protected against over-
If the LINM bit is set in the Interrupt Mask Register (IMR),
The transmitter is automatically re-enabled once the
A read of the LIN Status Register (LINSR) with the TXD pin
The LIN transceiver has a short-circuit detection for the
If the LINM bit is set in the Interrupt Mask Register (IMR),
The transmitter is automatically re-enabled once the
A read of the LIN Status Register (LINSR) without the RXD
The LIN transceiver monitors the TXD input pin to detect a
If the LINM bit is set in the IMR, an Interrupt IRQ will be
BAT
), the transmitter will not be shut down. The bit
high.
at 5.0 V will clear the bit TXDOM.
LIN Dominant Voltage Level Selection
LDVS in the LIN Control Register (LINCR).
LIN Receiver Operation Only
disables the LIN TXD driver. If case of a LIN error condition,
this bit is automatically set. If a low-power mode is selected
with this bit set, the LIN wake-up functionality is disabled,
then in STOP mode, the RXD pin will reflect the state of the
LIN bus.
STOP Mode And Wake-up Feature
physical layer is disabled. If the LIN-PU bit was set in the Stop
mode sequence, the internal pull-up resistor is disconnected
from VSUP and a small current source keeps the LIN pin in
the recessive state. The receiver is still active and able to
detect wake-up events on the LIN bus line.
edge will generate a wake-up interrupt, and will be reported
in the Interrupt Source Register (ISR). Also see
SLEEP Mode And Wake-up Feature
physical layer is disabled. If the LIN-PU bit was set in the
Sleep mode sequence, the internal pull-up resistor is
disconnected from V
the LIN pin in recessive state. The receiver must be active to
detect wake-up events on the LIN bus line.
edge will generate a system wake-up (Reset), and will be
reported in the Interrupt Source Register (ISR). Also see
Figure
The transmitter is automatically re-enabled once TXD is
A read of the LIN Status Register (LINSR) with the TXD pin
The LIN dominant voltage level can be selected by the bit
While in Normal mode, the activation of the RXONLY bit
During Stop mode operation, the transmitter of the
A dominant level longer than T
During Sleep mode operation, the transmitter of the
A dominant level longer than T
33.
SUP
Analog Integrated Circuit Device Data
and a small current source keeps
PROPWL
PROPWL
Freescale Semiconductor
followed by a rising
followed by a rising
Figure
34.