DS90C387AVJD National Semiconductor, DS90C387AVJD Datasheet - Page 16

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DS90C387AVJD

Manufacturer Part Number
DS90C387AVJD
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of DS90C387AVJD

Number Of Elements
8
Input Type
CMOS/TTL
Operating Supply Voltage (typ)
3.3V
Differential Input High Threshold Voltage
100mV
Diff. Input Low Threshold Volt
-100mV
Output Type
Flat Panel Display
Differential Output Voltage
450mV
Operating Temp Range
-10C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
Number Of Receivers
48
Number Of Drivers
8
Lead Free Status / RoHS Status
Not Compliant

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Applications Information
DS90C387/DS90CF388
The DS90C387A/CF388A chipset is electrically similar to the
DS90C387/CF388. The DS90C387/CF388 is intended for
improved support of longer cable drive. Cable drive is en-
hanced with a user selectable pre-emphasis feature that
provides additional output current during transitions to coun-
teract cable loading effects. Optional DC balancing on a
Configuration Table
R_FB (Tx only)
R_FDE (both Tx and Rx)
DUAL (Tx only)
Pin
R_FB = V
R_FB = GND
R_FDE = V
R_FDE = GND
DUAL=V
DUAL=1/2V
DUAL=Gnd
TABLE 3. Transmitter / Receiver configuration table
Condition
(Continued)
CC
CC
CC
CC
Rising Edge Data Strobe
Falling Edge Data Strobe
Active data DE = High
Active data DE = Low
48-bit color (dual pixel) support
Single-to-dual support
24-bit color (single pixel) support
16
cycle-to-cycle basis, is also provided to reduce ISI (Inter-
Symbol Interference). With pre-emphasis and DC balancing,
a low distortion eye-pattern is provided at the receiver end of
the cable. A cable deskew capability has been added to
deskew long cables of pair-to-pair skew of up to +/−1 LVDS
data bit time (up to 80 MHz Clock Rate). These three en-
hancements allow cables 5+ meters in length to be driven
depending upon media and clock rate.
Configuration

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