XC2C128-7TQG144C Xilinx Inc, XC2C128-7TQG144C Datasheet - Page 10
![CPLD CoolRunner™-II Family 3K Gates 128 Macro Cells 152MHz 0.18um (CMOS) Technology 1.8V 144-Pin TQFP EP](/photos/6/70/67094/144tqfp_sml.jpg)
XC2C128-7TQG144C
Manufacturer Part Number
XC2C128-7TQG144C
Description
CPLD CoolRunner™-II Family 3K Gates 128 Macro Cells 152MHz 0.18um (CMOS) Technology 1.8V 144-Pin TQFP EP
Manufacturer
Xilinx Inc
Series
CoolRunner IIr
Specifications of XC2C128-7TQG144C
Package
144TQFP EP
Family Name
CoolRunnerÂ-II
Device System Gates
3000
Number Of Macro Cells
128
Maximum Propagation Delay Time
7.5 ns
Number Of User I/os
100
Number Of Logic Blocks/elements
8
Typical Operating Supply Voltage
1.8 V
Maximum Operating Frequency
152 MHz
Number Of Product Terms Per Macro
40
Operating Temperature
0 to 70 °C
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.0ns
Voltage Supply - Internal
1.7 V ~ 1.9 V
Number Of Logic Elements/blocks
8
Number Of Macrocells
128
Number Of Gates
3000
Number Of I /o
100
Mounting Type
Surface Mount
Package / Case
144-TQFP, 144-VQFP
Features
JTAG
Voltage
1.8V
Memory Type
CMOS
Case
TQFP144
Dc
04+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1397
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC2C128-7TQG144C
Manufacturer:
XILINX
Quantity:
14
XC2C128 CoolRunner-II CPLD
Typical I/V Output Curves
The I/V curve illustrates the nominal amount of current that an I/O can source/sink at different voltage levels.
Pin Descriptions
11
10
Function
1(GTS1)
1(GTS0)
Block
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Macro-
cell
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
60
50
40
30
20
10
0
0
VQ100 CP132 TQ144
1.8V
13
12
11
10
9
8
7
6
4
3
-
-
-
-
-
-
.5
1.5V
G1
D1
D2
C1
C2
C3
3.3V
2.5V
F1
F2
F3
E1
E2
E3
-
-
-
-
Figure 4: Typical I/V Curves for XC2C128
VO (Output Volts)
1.0
17
16
15
14
13
12
11
10
9
7
6
5
-
-
-
-
Bank
I/O
www.xilinx.com
2
2
2
2
2
2
2
2
2
2
2
2
-
-
-
-
1.5
Pin Descriptions (Continued)
2(CDRST)
Function
2(GCK0)
2(GCK1)
2(GCK2)
Block
2.0
2
2
2
2
2
2
2
2
2
2
2
2
Macro-
cell
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
2.5
VQ100 CP132 TQ144
14
15
16
17
18
19
22
23
24
27
-
-
-
-
-
-
XC128_IV_all_050703
3.0
DS093 (v3.2) March 8, 2007
M2
G2
G3
H1
H2
H3
N2
Iol
K1
K3
J1
J2
L2
-
-
-
-
Product Specification
3.5
19
21
22
23
24
25
26
28
30
32
35
38
-
-
-
-
Bank
I/O
1
1
1
1
1
1
1
1
1
1
1
1
-
-
-
-
R