LTC1553LCSW#TRM Linear Technology, LTC1553LCSW#TRM Datasheet - Page 7

• Manufacturer Part Number: LTC1553LCSW#TRM
• Manufacturer: Linear Technology

Specifications of LTC1553LCSW#TRM

• Lead Free Status / RoHS Status: Not Compliant

PIN
VID0, VID1, VID2, VID3, VID4 (Pins 18, 17, 16, 15, 14):
Digital Voltage Select. TTL inputs used to set the regulated
output voltage required by the processor (Table 3). There
is an internal 20k pull-up at each pin. When all five VID
pins are high or floating, the chip will shut down.
OUTEN (Pin 19): Output Enable. TTL input which enables
the output voltage. The external MOSFET temperature can
be monitored with an external thermistor as shown in
Figure 11. When the OUTEN input voltage drops below 2V,
BLOCK
OUTEN 19
COMP
SS
U
10
9
FUNCTIONS
115% V
U
DIAGRAM
REF
MHCL
I
U
SS
–
+
FC
W
HCL MONO
Q
SS
V
+
REF
ERR
12
FAULT
–
–
+
PWM
V
LOGIC
REF
11
–
– 5%
OT
MIN
R
S
CC
n
DISDR
+
–
+
OT trips. As OUTEN drops below 1.7V, the drivers are
internally disabled to prevent the MOSFETs from heating
further. If OUTEN is less than 1.2V for longer than 30 s,
the LTC1553L will enter shutdown mode. The internal
oscillator can be synchronized to a faster external clock by
applying the external clocking signal to the OUTEN pin.
G1 (Pin 20): Gate Drive for the Upper N-Channel MOSFET,
Q1. This output will swing from PV
be low when G2 is high or the output is disabled.
SYSTEM
POWER
DOWN
I
MAX
8
7
V
REF
LVC
I
I
FB
MAX
–
+ 5%
+
–
MAX
+
0.5V
0.7V
REF
REF
/
V
REF
FB
DELAY
CC
DAC
to GND. It will always
BG
LTC1553L
13
20
18
17
16
15
14
2
1
6
1553 BD
PWRGD
PV
G1
G2
SENSE
VID0
VID1
VID2
VID3
VID4
7
CC