AD9858BSV Analog Devices Inc, AD9858BSV Datasheet - Page 7

• Manufacturer Part Number: AD9858BSV
• Manufacturer: Analog Devices Inc

Specifications of AD9858BSV

• Lead Free Status / RoHS Status: Not Compliant

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin No.
1 to 4, 9 to 12
5, 6, 21, 28, 95, 96
7, 8, 20, 23 to 27,
93, 94
13 to 18
16
ADDR2/IORESET
ADDR0/SDIO
ADDR1/SDO
WR/SCLK
ADDR5
ADDR4
ADDR3
RD/CS
DGND
DGND
DGND
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
Mnemonic
D7 to D0
DGND
DVDD
ADDR5 to
ADDR0
IORESET
D3
D2
D1
D0
D7
D6
D5
D4
22
23
24
13
25
10
11
12
13
14
15
16
17
18
19
20
21
9
1
2
3
4
5
6
7
8
NOTES
1. NC = NO CONNECT.
2. THE TQFP_EP (THERMAL SLUG) MUST BE ATTACHED TO THE GROUND PLANE OR SOME OTHER LARGE
METAL MASS FOR THERMAL TRANSFER. FAILURE TO DO SO MAY CAUSE EXCESSIVE DIE TEMPERATURE
RISE AND DAMAGE TO THE DEVICE.
100
26
99
27
I/O
I
I
I
98
28
97
29
Description
Parallel Port Data. The functionality of these pins is valid only when the I/O port is configured as
a parallel port.
Digitial Ground.
Digital Supply Voltage.
When the I/O port is configured as a parallel port, these pins serve as a 6-bit address select for
accessing the on-chip registers (see the IORESET, SDO, and SDIO pins for the serial port mode).
This is valid for serial programming mode only. Active high input signal that resets the serial I/O
bus controller. It serves as a means of recovering from an unresponsive serial bus caused by
an improper programming protocol. Asserting an I/O reset does not affect the contents of
previously programmed registers, nor does it invoke their default values.
96
30
95
31
94
32
93
33
92
34
Figure 2. Pin Configuration
91
35
Rev. C | Page 7 of 32
90
36
89
37
(Not to Scale)
AD9858
TOP VIEW
88
38
87
39
86
40
85
41
84
42
83
43
82
44
81
45
80
46
79
47
78
48
77
49
76
50
75
74
73
72
70
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
71
69
NC
AGND
AVDD
DIV
DIV
AVDD
AGND
CPGND
CPVDD
CP
CP
CPFL
CPGND
CPVDD
CPISET
NC
NC
PFD
PFD
IF
IF
RF
RF
AGND
AVDD
AD9858