AT52BR1664-90CU Atmel, AT52BR1664-90CU Datasheet - Page 6

• Manufacturer Part Number: AT52BR1664-90CU
• Manufacturer: Atmel

Specifications of AT52BR1664-90CU

• Operating Supply Voltage (max): 3.3V
• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6
AT52BR1662(T)/1664(T)
CHIP ERASE: The entire device can be erased at one time by using the six-byte chip erase
software code. After the chip erase has been initiated, the device will internally time the erase
operation so that no external clocks are required. The maximum time to erase the chip is t
If the sector lockdown has been enabled, the chip erase will not erase the data in the sector
that has been locked out; it will erase only the unprotected sectors. After the chip erase, the
device will return to the read or standby mode.
SECTOR ERASE: As an alternative to a full chip erase, the device is organized into 39 sec-
tors (SA0 - SA38) that can be individually erased. The Sector Erase command is a six-bus
cycle operation. The sector address is latched on the falling WE edge of the sixth cycle while
the 30H data input command is latched on the rising edge of WE. The sector erase starts after
the rising edge of WE of the sixth cycle. The erase operation is internally controlled; it will
automatically time to completion. The maximum time to erase a sector is t
tor programming lockdown feature is not enabled, the sector will erase (from the same Sector
Erase command). An attempt to erase a sector that has been protected will result in the oper-
ation terminating in 2 µs.
WORD PROGRAMMING: Once a memory block is erased, it is programmed (to a logical “0”)
on a word-by-word basis. Programming is accomplished via the internal device command reg-
ister and is a four-bus cycle operation. The device will automatically generate the required
internal program pulses.
Any commands written to the chip during the embedded programming cycle will be ignored. If
a hardware reset happens during programming, the data at the location being programmed
will be corrupted. Please note that a data “0” cannot be programmed back to a “1”; only erase
operations can convert “0”s to “1”s. Programming is completed after the specified t
time. The Data Polling feature or the Toggle Bit feature may be used to indicate the end of a
program cycle. If the erase/program status bit is a “1”, the device was not able to verify that the
erase or program operation was performed successfully.
VPP PIN: The circuitry of the 16-megabit Flash is designed so that the device can be pro-
grammed or erased from the V
than 1.65V and less than or equal to the VCC pin, the device selects the V
gramming and erase operations. When the VPP pin is greater than the V
will select the V
device will allow for some variations between the V
selection of V
2.7V < V
input signal. When the V
in the 5V ± 0.5V or 12V ± 0.5V range to ensure proper operation. The V
floating.
PROGRAM/ERASE STATUS: The device provides several bits to determine the status of a
program or erase operation: I/O2, I/O3, I/O5, I/O6 and I/O7. The “Status Bit Table” on page 12
and the following four sections describe the function of these bits. To provide greater flexibility
for system designers, the 16-megabit Flash contains a programmable configuration register.
The configuration register allows the user to specify the status bit operation. The configuration
register can be set to one of two different values, “00” or “01”. If the configuration register is set
to “00”, the part will automatically return to the read mode after a successful program or erase
operation. If the configuration register is set to a “01”, a Product ID Exit command must be
given after a successful program or erase operation before the part will return to the read
mode. It is important to note that whether the configuration register is set to a “00” or to a “01”,
any unsuccessful program or erase operation requires using the Product ID Exit command to
return the device to read mode. The default value (after power-up) for the configuration regis-
ter is “00”. Using the four-bus cycle Set Configuration Register command as shown in the
“Command Definition in Hex” table on page 13, the value of the configuration register can be
CC
< 3.6V, then the program or erase operations will use V
CC
or V
PP
input as the power supply for programming and erase operations. The
PP
for program or erase operations. If the VPP pin is within 0.3V of V
PP
signal is used for program and erase operations, the V
CC
power supply or from the VPP input pin. When V
PP
input and the V
CC
CC
and disregard the V
CC
pp
SEC
power supply in its
supply, the device
CC
pin cannot be left
. When the sec-
supply for pro-
2212C–STKD–09/02
PP
PP
is greater
BP
must be
CC
cycle
EC
for
PP
.