AT25640AN-10SU-2.7 SL383 Atmel, AT25640AN-10SU-2.7 SL383 Datasheet - Page 9

• Manufacturer Part Number: AT25640AN-10SU-2.7 SL383
• Manufacturer: Atmel

Specifications of AT25640AN-10SU-2.7 SL383

• Density: 64Kb
• Interface Type: Serial (SPI)
• Organization: 8Kx8
• Access Time (max): 40ns
• Frequency (max): 10MHz
• Write Protection: Yes
• Data Retention: 100Year
• Operating Supply Voltage (typ): 3.3/5V
• Package Type: SOIC
• Operating Temp Range: -40C to 85C
• Supply Current: 10mA
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Compliant

3. Functional Description
3347L–SEEPR–06/07
The AT25080A/160A/320A/640A is designed to interface directly with the synchronous serial
peripheral interface (SPI) of the 6805 and 68HC11 series of microcontrollers.
The AT25080A/160A/320A/640A utilizes an 8-bit instruction register. The list of instructions and
their operation codes are contained in
ferred with the MSB first and start with a high-to-low CS transition.
Table 3-1.
WRITE ENABLE (WREN): The device will power up in the write disable state when V
applied. All programming instructions must therefore be preceded by a Write Enable instruction.
WRITE DISABLE (WRDI): To protect the device against inadvertent writes, the Write Disable
instruction disables all programming modes. The WRDI instruction is independent of the status
of the WP pin.
READ STATUS REGISTER (RDSR): The Read Status Register instruction provides access to
the status register. The READY/BUSY and Write Enable status of the device can be determined
by the RDSR instruction. Similarly, the Block Write Protection Bits indicate the extent of protec-
tion employed. These bits are set by using the WRSR instruction.
Table 3-2.
Instruction Name
WREN
WRDI
RDSR
WRSR
READ
WRITE
WPEN
Bit 7
Instruction Set for the AT25080A/160A/320A/640A
Status Register Format
Bit 6
X
Instruction Format
0000 X110
0000 X100
0000 X101
0000 X001
0000 X011
0000 X010
Bit 5
X
Bit 4
Table
X
AT25080A/160A/320A/640A
3-1. All instructions, addresses, and data are trans-
Bit 3
BP1
Operation
Set Write Enable Latch
Reset Write Enable Latch
Read Status Register
Write Status Register
Read Data from Memory Array
Write Data to Memory Array
Bit 2
BP0
WEN
Bit 1
Bit 0
RDY
CC
is
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